Re: A new article about 6502
Posted: Tue Sep 22, 2020 9:21 am
brain wrote:
In your original post, you asked for any comments around use of English. As a native English speaker, I can assure you "mediocre" is not viewed to an English reader as "satisfactory". [...] Thus, the English reader will see:
"The 6800 is a mediocre processor"
as
"The 6800 had the potential to be a better or more capable processor, but failed to live up to that expectation and is just average."
"The 6800 is a mediocre processor"
as
"The 6800 had the potential to be a better or more capable processor, but failed to live up to that expectation and is just average."
brain wrote:
You didn't quote enough of my response. I said:
I'm not comparing the TMS9900, I'm suggesting that the use of the word will put the reader on the defensive, as most TMS9900 enthusiasts are when people claim that processor is "mediocre", when in fact it's due more to the constraints imposed by the TI 99/4A design (and that's a statement TI 99 4/A folks will argue). In short, my point is that "mediocre" is a word best used if you want to dismiss or belittle something and you can't say the item has no value or that it is less than average.
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But, calling something "mediocre" is just asking for the fight. Case in point, the TMS9900 16 bit processor in the TI 99/4A is hardly a "mediocre" processor. But, the performance of the TI 99/4A suffered greatly due to system design constraints that strangled the poor processor's capabilities.
brain wrote:
brain wrote:
Saying Bill did not improve the NMOS 6502 seems highly editorial to me. He improved it by moving it to CMOS.
We shall agree to disagree then. I think saying a designer of a chip did not improve the chip when everyone knows he designed the much improved successor to the IC means he improved the chip.
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This is exactly what I wrote about...
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While Intel, Motorola and others had already made 16-bit processors of new generations, the 6502 was only microscopically improved and made artificially partially incompatible with itself. Even if you compare the improvements made in the Motorola 6801 over the 6800 or the Intel 8085 over the 8080, they are gigantic compared to those made in the 65C02, and Intel and Motorola made them much earlier.
brain wrote:
The statement implies that the 2MHz mode (which you belittle a bit in your sentence by noting it could only be used in one of the modes, which is not completely true, you could run the 64 mode in 2MHz without the VIC-II running, which some 64 apps used to speed up code running during VBLANK on the C128 in 64 mode) was a joke because noone targeted the "mode", but the sentence implies the "mode" is "the 2MHz mode". But, that's misleading. No one targeted the C128 mode because the unit would run perfectly fine in 64 mode, and targeting that mode gave the software developer/seller a 20 Million customer base as opposed to a 4.5Million potential customer base. It had nothing to do with the speed of the CPU, but (again), the issues with the PC the 2MHz operation was contained within
I completely disagree with your logic about the C128 software. New software for better hardware arrives quite soon. Let us remember the IBM PC compatibles... The 2 Mhz mode was just abandoned because it was almost completely incompatible with the c64 and the whole idea behind of the C128 was this compatibility. Anyway I don't try to explain why the 2 MHz was deserted I just show the fact of its desertion, people just were not given a real opportunity to use it. The most crazy thing for me is 64 KB VRAM in the C128DCR while MMU were still limited to 128 KB only. They added RAM for a deserted chip but left the main CPU without additional RAM feed! IMHO Commodore just buried itself with such crazy designs.
brain wrote:
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Sorry I meant Asteroid game for an Atari computer. Bill told about it - https://www.youtube.com/watch?v=7YoolSA ... be&t=28230
It is strange I could not google this information and I am sure that it was written somewhere on the net. Internet really has viruses which are eating valuable information.
It is strange I could not google this information and I am sure that it was written somewhere on the net. Internet really has viruses which are eating valuable information.
brain wrote:
I think you're being too harsh on Bill in the article, but it's your prerogative to do so, so I have no further comment.
brain wrote:
Well, that's why I continue to respond to the thread. I gather you're interested in mastering the English language, and what better way than to write about technical subjects you already know about.
brain wrote:
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I still not understand your point about my phrase "the 6502 was only microscopically improved and made artificially partially incompatible with itself" in relation to the 4510. This phrase relates to the 65C02 only. Information about the 4510 follows much later.
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the 6502 design was never materially improved and the minimal improvement made in the CPU line created partially incompatible devices.
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While Intel, Motorola and others had already made 16-bit processors of new generations, the 6502 was only microscopically improved and made artificially partially incompatible with itself.
brain wrote:
I think everyone agrees if was a bug, or at least an unplanned use case, so it was documented as opposed to fixing (they fixed the ROR bug).
BTW in his latest interview Bill Mensch said that the case with the ROR instruction was not a bug.brain wrote:
I don't agree that the Fagin 8080->Z80 ISA differs from Mensch 6502 -> 65C02 ISA. I don't think Fagin designed the Z80 ISA, but rather took the ready made ISA from the 8080 and extended it, just like Bill extended the 6502 ISA. (The fact that Fagin also designed the 8080 ISA is not relevant here).
As I said before, I think he improved the processor by moving it to CMOS and cleaning up the illegal opcodes. Our disagreement may stem from my feeling that faster speed and movement to CMOS gave the 6502 line a longevity that it would never have achieved in the NMOS variant, thus I value that significantly, and I think you do not. You appear to give more weight to additional opcodes and functions on-chip, like multiply and divide instructions and such. I don't think either is wrong per se, but if Bill had added a ton of new opcodes but had not moved it to CMOS, it would never have hit the speeds we now see, and it would never have been popular in the embedded designs (all of them needed a CMOS design to lay into their SOC designs). This forum would have suffered as a result.
As I said before, I think he improved the processor by moving it to CMOS and cleaning up the illegal opcodes. Our disagreement may stem from my feeling that faster speed and movement to CMOS gave the 6502 line a longevity that it would never have achieved in the NMOS variant, thus I value that significantly, and I think you do not. You appear to give more weight to additional opcodes and functions on-chip, like multiply and divide instructions and such. I don't think either is wrong per se, but if Bill had added a ton of new opcodes but had not moved it to CMOS, it would never have hit the speeds we now see, and it would never have been popular in the embedded designs (all of them needed a CMOS design to lay into their SOC designs). This forum would have suffered as a result.
You are wrong saying that CMOS automatically gives higher speed. CMOS technology allowed to make faster chips than NMOS only in the early 90s when the CMOS 65816 and Z80 at 16 MHz started to be manufactured. You can also check the speed of the CMOS RCA 1802.
brain wrote:
The 3-4 MHz refers to the actual bus speed of the system. In dual memory access designs, in which two devices share a common memory by time slicing access to the memory (of which the VIC-20, 64, 128, and others were in this camp), the bus speed has to run at twice the CPU speed. So, in the 1MHz 64, the memory has to run at 2MHz, and in the C128, the memory has to run at 4MHz. My point was that DRAM speeds of the day, coupled with the dual memory access designs used in these machines, limited CPU speed.
brain wrote:
I don't think he's on here, but he's been wildly successful in spite of his lack of improving the 6502.
brain wrote:
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Thus, MOS Technology has left holes in the 650X instruction bit pattern to accommodate a "quasi-16-bit machine."
BillG wrote:
Trust me, the signed arithmetic example is not contrived. I am working on compilers and that is a very possible case in a language permitting mixed variable sizes and signedness.
