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Microbot TeachMover 6502 based Robot Arm, Memory Map

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Posted: Thu Sep 15, 2011 3:49 pm
by leeeeee
I use Michal Kowalski's 6502 simulator for most 6502 assembly/disassembly/debugging.

His page disappeared sometime ago but I've put up copies of the source archive, program archive and documents archive.

Lee.

Posted: Thu Sep 15, 2011 5:55 pm
by falcon5252
I downloaded it an opened it in Vista and it ran, Do I need to use a compatibility mode with it, or will it work ok without it..

Also will Michal Kowalski's program compile it to a BIN or HEX file for programming a Prom or do I need a separate program for that

Posted: Thu Sep 15, 2011 6:49 pm
by Nightmaretony
The Kowalski will go into several formats, several hex and bin. you need an eprom programmer program, though.

///nother Kowalski lover

//since it is now abandonware, I can make a page to host it, can we get a project to udpate it for other things like 816 or 32 or org32?

Kowalski Simulator

Posted: Thu Sep 15, 2011 7:29 pm
by BigDumbDinosaur
Nightmaretony wrote:
The Kowalski will go into several formats, several hex and bin. you need an eprom programmer program, though.

///nother Kowalski lover

//since it is now abandonware, I can make a page to host it, can we get a project to udpate it for other things like 816 or 32 or org32?
Incidentally, I have developed a macro set that allows most of the 65C816 native mode instructions to be assembled in the Kowalski simulator. BRL when the branch target is forward of the instruction will not work, as there is a forward reference involved.

Code: Select all

;================================================================================
;
;W65C816S INSTRUCTION MACROS
;
;	---------------------------------------------------------
;	These macros implement W65C816S native mode instructions,
;	as well as 65C02 instructions that are not recognized by
;	the Kowalski assembler (e.g., STP & WAI).
;	---------------------------------------------------------
;
	.if !.ref(brl)
;
brl      .macro .op            ;long relative branch...
         .if .op               ;won't work for forward...
.isize   =3                    ;branches because of forward...
.os      =*+.isize             ;address reference
.os      =.op-.os
             .if .os > 32767
                 .error %1 + ": FORWARD BRANCH OUT OF RANGE"
             .endif
             .if .os < -32768
                 .error %1 + ": BACKWARD BRANCH OUT OF RANGE"
             .endif
             .byte $82
             .word .os
         .else
             .error "INSTRUCTION REQUIRES TARGET ADDRESS"
         .endif
         .endm
;
cop      .macro .op            ;co-processor
         .if .op > $ff
             .error "SIGNATURE MUST BE $00 - $FF"
         .endif
         .byte $02,.op
         .endm
;
jsl      .macro .bk,.ad        ;JSL <bank><addr>
         .byte $22
         .word .ad
         .byte .bk
         .endm
;
jsrix    .macro .op            ;JSR (<addr>,X)
         .byte $fc
         .word .op
         .endm
;
mvn      .macro .s,.d          ;move next <sbnk>,<dbnk>
         .if .s > $ff
             .error "SOURCE BANK MUST BE $00 - $FF"
         .endif
         .if .d > $ff
             .error "DESTINATION BANK MUST BE $00 - $FF"
         .endif
         .byte $54,.d,.s
         .endm
;
mvp      .macro .s,.d          ;move prev <sbnk>,<dbnk>
         .if .s > $ff
             .error "SOURCE BANK MUST BE $00 - $FF"
         .endif
         .if .d > $ff
             .error "DESTINATION BANK MUST BE $00 - $FF"
         .endif
         .byte $44,.d,.s
         .endm
;
pea      .macro .op            ;pea <addr>
         .byte $f4
         .word .op
         .endm
;
pei      .macro .op            ;pei (<addr>)
         .if .op > $ff
             .error "INDIRECT ADDRESS MUST BE $00 - $FF"
         .endif
         .byte $d4,.op
         .endm
;
phb      .macro                ;push data bank register
         .byte $8b
         .endm
;
phd      .macro                ;push direct page register
         .byte $0b
         .endm
;
phk      .macro                ;push program bank register
         .byte $4b
         .endm
;
plb      .macro                ;pull data bank register
         .byte $ab
         .endm
;
pld      .macro                ;pull direct page register
         .byte $2b
         .endm
;
rep      .macro .op            ;clear status register bits
         .if .op > $ff
             .error "OPERAND MUST BE $00 - $FF"
         .endif
         .byte $c2,.op
         .endm
;
sep      .macro .op            ;set status register bits
         .if .op > $ff
             .error "OPERAND MUST BE $00 - $FF"
         .endif
         .byte $e2,.op
         .endm
;
stp      .macro                ;halt MPU
         .byte $db
         .endm
;
tcd      .macro                ;transfer .C to direct page register
         .byte $5b
         .endm
;
tcs      .macro                ;transfer .C to stack pointer
         .byte $1b
         .endm
;
tdc      .macro                ;transfer direct page register to .C
         .byte $7b
         .endm
;
tsc      .macro                ;transfer stack pointer to .C
         .byte $3b
         .endm
;
txy      .macro                ;transfer .X to .Y
         .byte $9b
         .endm
;
tyx      .macro                ;transfer .Y to .X
         .byte $bb
         .endm
;
wai      .macro                ;wait for interrupt
         .byte $cb
         .endm
;
xba      .macro                ;swap B & A accumulators
         .byte $eb
         .endm
;
xce      .macro                ;swap carry & emulation bits
         .byte $fb
         .endm
;
;
;	stack-based accumulator instructions...
;
;	---------------------------------------------------------------------
;	Stack-based accumulator instructions take the form ***S or ***SI, the
;	latter for indexed indirect operations.   *** represents  the  parent
;	instruction.  For example, LDAS 1 is equivalent to LDA 1,S &  LDASI 1
;	is the equivalent of LDA (1,S),Y.  The actual macro names  are  lower
;	case.  The macro comment indicates the official WDC assembly language
;	syntax for the instruction being synthesized.
;	---------------------------------------------------------------------
;
adcs     .macro .op            ;ADC <offset>,S
         .if .op > $ff
             .error "OFFSET MUST BE $00 - $FF"
         .endif
         .byte $63,.op
         .endm
;
adcsi    .macro .op            ;ADC (<offset>,S),Y
         .if .op > $ff
             .error "OFFSET MUST BE $00 - $FF"
         .endif
         .byte $73,.op
         .endm
;
ands     .macro .op            ;AND <offset>,S
         .if .op > $ff
             .error "OFFSET MUST BE $00 - $FF"
         .endif
         .byte $23,.op
         .endm
;
andsi    .macro .op            ;AND (<offset>,S),Y
         .if .op > $ff
             .error "OFFSET MUST BE $00 - $FF"
         .endif
         .byte $33,.op
         .endm
;
cmps     .macro .op            ;CMP <offset>,S
         .if .op > $ff
             .error "OFFSET MUST BE $00 - $FF"
         .endif
         .byte $c3,.op
         .endm
;
cmpsi    .macro .op            ;CMP (<offset>,S),Y
         .if .op > $ff
             .error "OFFSET MUST BE $00 - $FF"
         .endif
         .byte $d3,.op
         .endm
;
eors     .macro .op            ;EOR <offset>,S
         .if .op > $ff
             .error "OFFSET MUST BE $00 - $FF"
         .endif
         .byte $43,.op
         .endm
;
eorsi    .macro .op            ;EOR (<offset>,S),Y
         .if .op > $ff
             .error "OFFSET MUST BE $00 - $FF"
         .endif
         .byte $53,.op
         .endm
;
ldas     .macro .op            ;LDA <offset>,S
         .if .op > $ff
             .error "OFFSET MUST BE $00 - $FF"
         .endif
         .byte $a3,.op
         .endm
;
ldasi    .macro .op            ;LDA (<offset>,S),Y
         .if .op > $ff
             .error "OFFSET MUST BE $00 - $FF"
         .endif
         .byte $b3,.op
         .endm
;
oras     .macro .op            ;ORA <offset>,S
         .if .op > $ff
             .error "OFFSET MUST BE $00 - $FF"
         .endif
         .byte $03,.op
         .endm
;
orasi    .macro .op            ;ORA (<offset>,S),Y
         .if .op > $ff
             .error "OFFSET MUST BE $00 - $FF"
         .endif
         .byte $13,.op
         .endm
;
sbcs     .macro .op            ;SBC <offset>,S
         .if .op > $ff
             .error "OFFSET MUST BE $00 - $FF"
         .endif
         .byte $e3,.op
         .endm
;
sbcsi    .macro .op            ;SBC (<offset>,S),Y
         .if .op > $ff
             .error "OFFSET MUST BE $00 - $FF"
         .endif
         .byte $f3,.op
         .endm
;
stas     .macro .op            ;STA <offset>,S
         .if .op > $ff
             .error "OFFSET MUST BE $00 - $FF"
         .endif
         .byte $83,.op
         .endm
;
stasi    .macro .op            ;STA (<offset>,S),Y
         .if .op > $ff
             .error "OFFSET MUST BE $00 - $FF"
         .endif
         .byte $93,.op
         .endm
;
;
;	16 bit immediate mode instructions...
;
;	--------------------------------------------------------------------
;	Immediate mode instructions that are able to accept 16 bit  operands
;	take the form ***W, where *** is the parent 8 bit  instruction.  For
;	example, ADCW is the 16 bit form of ADC.  The actual macro names are
;	lower case.   It is the responsibility of the  programmer to  assure
;	that MPU register sizes have been correctly configured before  using
;	***W instructions.  For example:
;
;		LONGA                 ;16 bit .A & memory
;		LDAW $1234            ;equivalent to LDA #$1234
;		SHORTA                ;8 bit .A & memory
;		LDAW $1234            ;won't work as expected!!!
;
;	The macro comment indicates the official WDC assembly language  syn-
;	tax for the instruction being synthesized.
;	--------------------------------------------------------------------
;
adcw     .macro .op            ;ADC #nnnn
         adc #<.op
         .byte >.op
         .endm
;
andw     .macro .op            ;AND #nnnn
         and #<.op
         .byte >.op
         .endm
;
bitw     .macro .op            ;BIT #nnnn
         bit #<.op
         .byte >.op
         .endm
;         
cmpw     .macro .op            ;CMP #nnnn
         cmp #<.op
         .byte >.op
         .endm
;
cpxw     .macro .op            ;CPX #nnnn
         cpx #<.op
         .byte >.op
         .endm
;
cpyw     .macro .op            ;CPY #nnnn
         cpy #<.op
         .byte >.op
         .endm
;
eorw     .macro .op            ;EOR #nnnn
         eor #<.op
         .byte >.op
         .endm
;
ldaw     .macro .op            ;LDA #nnnn
         lda #<.op
         .byte >.op
         .endm
;
ldxw     .macro .op            ;LDX #nnnn
         ldx #<.op
         .byte >.op
         .endm
;
ldyw     .macro .op            ;LDY #nnnn
         ldy #<.op
         .byte >.op
         .endm
;
oraw     .macro .op            ;ORA #nnnn
         ora #<.op
         .byte >.op
         .endm
;
sbcw     .macro .op            ;SBC #nnnn
         sbc #<.op
         .byte >.op
         .endm
;
;
;	register size macros...
;
;	--------------------------------------------------------------------
;	These macros are a convenient way to change the MPU's register sizes
;	without having to remember the correct bit pattern for the REP & SEP
;	instructions.
;	--------------------------------------------------------------------
;
longa    .macro                ;16 bit accumulator & memory
         rep $20
         .endm
;
longr    .macro                ;16 bit all registers
         rep $30
         .endm
;
longx    .macro                ;16 bit index registers
         rep $10
         .endm
;
shorta   .macro                ;8 bit accumulator & memory
         sep $20
         .endm
;
shortr   .macro                ;8 bit all registers
         sep $30
         .endm
;
shortx   .macro                ;8 bit index registers
         sep $10
         .endm
;
;
;	INT instruction - assembles as BRK followed by operand...
;
int      .macro .op            ;INT <intnum>
         .if .op > $ff
             .error "INTERRUPT NUMBER MUST BE $00 - $FF"
         .endif
         .byte $00,.op
         .endm
;
	.endif
	.end
Incidentally, the simulator *assembles* programs, not *compiles* them. :lol:
-----
I updated the macro listing to fix a typo that was recently discovered.

--BDD

Posted: Thu Sep 15, 2011 7:54 pm
by falcon5252
Tony ... I'm just going by what Lee Recommended.. And I just downloaded it 15 min ago so I have no Idea what it is capable of.. Besides I don't see allot of alternatives that will run in windows.. So are there any windows based Compilers, And which do you recommend... I have a Prom Programmer but it's a piece if junk, But it let me extract the binary from the Robots Prom... Just hoping it will program the Fash Mem I bought to replace the original Prom...

Wheres a good place to buy a 4mhz or faster 65802 & 65C02P4 at a decent price that takes Paypal.. I know its not ebay 65C02P4 listed at $79

Do the 65802's default to 8 bit mode or do they need a command in the Prom reset vector to set the Mode..

Lee... How are they creating the stepper step and speed timing routines, And would it be a major or minor change to get it to run on a faster processor.. With a clock divider circuit for slow I/O including ACIA and VIA all timed events there should run at the same speed.. I think therefor I could be wrong...

Posted: Thu Sep 15, 2011 7:58 pm
by leeeeee
Quote:
since it is now abandonware, I can make a page to host it,
I've found a current email address for Michal and have asked him for permission, I'm just waiting on a reply.
Quote:
can we get a project to udpate it for other things like 816 or 32 or org32?
As it's written in Microsoft Visual C a lot of it is pretty impenetrable. I've asked about this before and the consensus seemed to be it would be easier to write a new program than port this one to C++.

Lee.

Posted: Thu Sep 15, 2011 8:02 pm
by Nightmaretony
Ah, ok. Sigh. Was hopping to see a more open source version that is easier to update and maintain...

Posted: Thu Sep 15, 2011 8:20 pm
by leeeeee
Ok. Definately not abandonware. The current page for Michal's simulator is http://exifpro.com/utils.html

Lee.

Posted: Thu Sep 15, 2011 10:20 pm
by falcon5252
I found a SBC 65C02P2 $30 just bought it... Main board from a arcade game..16k ram, 16k rom, 2 via, 6 x 8 bit latched outputs 2 relays and 10 unpopulated & un-socketed places for what appears to be more latches or buss drivers routed to dip & sip headers, Plus 2 serial port drivers but no ACIA .. Looks like it will bee a good project board

Posted: Thu Sep 15, 2011 11:31 pm
by ElEctric_EyE
leeeeee wrote:
Ok. Definately not abandonware. The current page for Michal's simulator is http://exifpro.com/utils.html

Lee.
Ohhhh. That's some nice sharing Lee. I've been using V 1.2.5 from 2004. Still checking it out. Had to post my thanks first, as I am an avid user of MK's assembler/disassembler as well. I thought it was dead, but started to suspect otherwise from your earlier post as I've not seen that info reference here in the forums before.
This new version has a help file in addition to the doc's... :)
I've actually become more interested the abilities of the disassembler part of MK's work, when one opens a .bin/binary file in order to analyze.

Posted: Fri Sep 16, 2011 1:45 am
by BigDumbDinosaur
leeeeee wrote:
I've found a current email address for Michal and have asked him for permission, I'm just waiting on a reply.
Quote:
can we get a project to udpate it for other things like 816 or 32 or org32?
As it's written in Microsoft Visual C a lot of it is pretty impenetrable. I've asked about this before and the consensus seemed to be it would be easier to write a new program than port this one to C++.

Lee.
Complicating matters, the source code comments are in Polish. Urk!

Posted: Fri Sep 16, 2011 1:58 am
by BigDumbDinosaur
falcon5252 wrote:
Tony ... I'm just going by what Lee Recommended.. And I just downloaded it 15 min ago so I have no Idea what it is capable of.. Besides I don't see allot of alternatives that will run in windows.. So are there any windows based Compilers...
There are a number of Windows-based compilers that will emit 65xx code. However, what you are looking for is an assembler. There are a few of those as well.
Quote:
Wheres a good place to buy a 4mhz or faster 65802 & 65C02P4 at a decent price that takes Paypal.. I know its not ebay 65C02P4 listed at $79
The 65C802 was never produced in any quantities and, as far as I know, none have been available since the mid-1990s. Perhaps someone may know where one or two are lying about. I don't recommend building around it. If you want 16 bit functionality you should consider the 65C815.

The 65C02 can be purchased directly from WDC or from other sources. The stock part is rated at 14 MHz, but can be run as slowly as you desire.
Quote:
Do the 65802's default to 8 bit mode or do they need a command in the Prom reset vector to set the Mode..
Both the 65C816 and 65C802 start up in 65C02 emulation mode when reset. However, neither is 100 percent 65C02 compatible when running in emulation mode. Your choice, if you wish to plug a CMOS 65xx MPU into any 6502 socket, is to use the 65C02. However, there is a one-pin incompatibility. involving pin 1. That signal, VPB, doesn't exist in an NMOS 6502. It is necessary to bend that pin so it doesn't go into the socket or modify the PCB to isolate that connection. Otherwise, you will likely damage the 65C02.

Posted: Fri Sep 16, 2011 2:13 am
by GARTHWILSON
Quote:
If you want 16-bit functionality you should consider the 65C815
er...16 (not 15).

You can easily make the same board take either a 65c02 or an '816, using a few jumpers to make the choice. It is not necessary to latch, decode, or use the 816's high address byte to take advantage of many of the 816's strengths over the '02. You can totally ignore that bank byte if you're not interested in anything outside the first 64K bank. That's pretty much what the '802 does. I have one in a socket intended for the 65c02. I have one spare, but it's not for sale! :twisted:

Posted: Fri Sep 16, 2011 2:17 am
by BigDumbDinosaur
ElEctric_EyE wrote:
This new version has a help file in addition to the doc's... :)
The help file appears to be in Polish.

Posted: Fri Sep 16, 2011 2:19 am
by BigDumbDinosaur
GARTHWILSON wrote:
Quote:
If you want 16-bit functionality you should consider the 65C815
er...16 (not 15).
Damned keyboard! It didn't type what I was thinking. :lol:
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