6502.org

Um, isn't there a risk there of inadvertently selecting _both_ VIAs? It's obviously a question of never addressing the io/3x range, but generally I'd prefer something that physically excluded the possibility of two devices sending to the bus at the same time.

On occasion (rare, I know! ) my software has been known to do something other than that which I intended.

Neil

Good point... Besides the unique device I/O select ranges, there are overlapping address ranges that should be avoided...

...

There's a lot to be said for a 74xxx138 (choose family to supply the delay your system can handle): two low and one high enable, and decoding of three address lines... so using A4-6 and an output - either polarity - for an iosel, and A7 and A8 if desired to add up to 32 VIAs!

Neil

I agree. The 74xx138 is a versatile chip. You might also consider a single 74xx139 which could perform double-duty of sorts... That is, providing clock qualified read/write signals as well as four I/O device select strobes which could free several pins on the GAL... And, you could still connect two VIA's to one I/O select line.

It may be useful if for example you want to start the timers of both simultaneously.  I can do that on my workbench computer, and in the 6502 Primer, but I don't think I've ever taken advantage of it, nor has it ever resulted in any trouble.

You know me, BDD: I prefer discrete logic every time. But that's just my design ethic, I suppose - it hurts my brain to think of a decoder PAL eating all those milliamps!

Neil

You’d have to somehow guarantee the two VIAs can never be simultaneously selected during a read cycle so major data bus contention doesn’t occur.

And 150mA is starting to be noticeable if you are, for example, driving your circuit from a standard USB port... particularly if you need another high-current part in there as well.

Neil

Note that the '138 is very slow in 74HC, 74HCT, 74LS, and several others.  The 74FCT138CT is fast though.
Well, I've been doing it this way for over 30 years, and like I said, it has never been a problem.  I've never accidentally selected two at once to read from, unless it happened in a crash scenario where I had to use the reset button anyway; and even then, the pulse duration would have been far too short to do any damage.  I/O addresses to access should, in almost all cases, be constants anyway, like VIA2PB, and the assembler won't make a mistake and set an extra bit in the address constant.

You mean the 74FCT138?  That part has a VOH of 3.3, even when VCC is 5 volts.

I’ve used the 74AC138 in my discrete designs.  Switching speeds for 74AC138 and the 74AHC138 are about the same as that of the 74FCT138, but with a higher VOH in a 5 volt system.

Yes, FCT.  Going too fast again.  I'll go back and fix it.

I was forgetting that I'm using pull-up resistors to help it get higher output voltage.  Since the logic-low output is so strong, and since it's being used for I/O address decoding and only one output at a time will be low and usually all outputs are high, you can make the pull-ups pretty heavy without any significant effect on the current consumption of the computer.

The '138CT is about twice as fast as the '138T.