Re: Attempting to build a simple 6502 SBC from scratch
Posted: Sun Feb 26, 2023 3:26 pm
Garth - those "tips of the day" are awesome, thanks for sharing! I've learned a lot of cool tricks there.
Meanwhile, while I'm waiting for my 65C02 to arrive, I've been trying to implement a hexadecimal 7-segment decoder to visualize what's going on at the data bus. Initially I wanted to use GAL20V8. Here's what I came up with:
This worked, but I wanted two digits! Unfortunately, I could not use CLK in my GAL20V8 to drive two displays at once since the maximum number of terms in OR is 8, and I'd need to duplicate each of them based on the value of Q register (low = low nibble / right digit, high = high nibble / left digit)
So I decided to try and 1) implement driver with good old 7400 ICs in emulator (because why not?) and 2) try to multiplex lower and higher nibble of 8-bit input to each of the two displays.
I ended up with a huge matrix of AND & OR gates (I heard you guys like *big* schematics!) and simulated it in Digital (https://github.com/hneemann/Digital).
Initially I had 35 terms total, but there were some duplicates, so the final count of AND gates went down to 28:
I then arranged them all in a net of ANDs & ORs:
This seems to work on paper, but I was wondering if I missed anything here. Any tips are appreciated!
Digital circuit: Animated simulation (GIF, click to play):
Meanwhile, while I'm waiting for my 65C02 to arrive, I've been trying to implement a hexadecimal 7-segment decoder to visualize what's going on at the data bus. Initially I wanted to use GAL20V8. Here's what I came up with:
Code: Select all
GAL20V8
Hex-7Seg
CLK A B C D A1 B1 C1 D1 NC NC GND
/OE NC Q a b c d e f g NC VCC
a = A*/B*/C + /A*B*D + A*/D + /A*C + B*C + /B*/D
b = /A*/C*/D + /A*C*D + A*/C*D + /B*/C + /B*/D
c = /A*/C + /A*D + /C*D + /A*B + A*/B
d = /A*/B*/D + /B*C*D + B*/C*D + B*C*/D + A*/C
e = /B*/D + C*/D + A*C + A*B
f = /A*B*/C + /C*/D + B*/D + A*/B + A*C
g = /A*B*/C + /B*C + C*/D + A*/B + A*D
DESCRIPTION
Hexadecimal decoder for 7-segment displays
So I decided to try and 1) implement driver with good old 7400 ICs in emulator (because why not?) and 2) try to multiplex lower and higher nibble of 8-bit input to each of the two displays.
I ended up with a huge matrix of AND & OR gates (I heard you guys like *big* schematics!) and simulated it in Digital (https://github.com/hneemann/Digital).
Initially I had 35 terms total, but there were some duplicates, so the final count of AND gates went down to 28:
Code: Select all
>>> terms = re.findall('([A-D*/]+)', s)
['A*/B*/C', '/A*B*D', 'A*/D', '/A*C', 'B*C', '/B*/D', '/A*/C*/D', '/A*C*D', 'A*/C*D', '/B*/C', '/B*/D', '/A*/C', '/A*D', '/C*D', '/A*B', 'A*/B', '/A*/B*/D', '/B*C*D', 'B*/C*D', 'B*C*/D', 'A*/C', '/B*/D', 'C*/D', 'A*C', 'A*B', '/A*B*/C', '/C*/D', 'B*/D', 'A*/B', 'A*C', '/A*B*/C', '/B*C', 'C*/D', 'A*/B', 'A*D']
>>> len(terms)
35
>>> len(set(terms))
28
>>> set(terms)
{'/A*B*D', '/C*D', 'A*/B', '/B*C', '/A*C', 'B*C*/D', 'A*/D', 'A*B', 'A*/C', 'A*D', 'A*/B*/C', '/A*/C', '/B*/D', 'A*C', '/B*/C', 'A*/C*D', '/A*B*/C', '/A*C*D', 'B*C', '/B*C*D', '/A*/C*/D', '/A*D', '/C*/D', 'B*/D', '/A*B', 'C*/D', '/A*/B*/D', 'B*/C*D'}
Digital circuit: Animated simulation (GIF, click to play):
Still, I think that NOR can be made with 2 diodes, a NAND, and a pull-up: LCDEN = NOT(Ф1 DIODE_OR PULLUP(LCD/EN)). Will this work?