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Re: Enhanced Dynamically Reconfigurable Systems Using CPLD/F
Posted: Thu Nov 05, 2015 6:22 pm
by jmp(FFFA)
- I don't mind using a switching power supply, so feel free to suggest something. On the v1 sandbox board, the currents were pretty low though. The LDOs barely get warm. Keep in mind we'll need 3.3V and 1.2V for the FPGA and 1.8V for the ADV7391.
OK, I'll research this and see what I can come up with.
- External IRQ sounds reasonable. I propose to add a small expansion/IO connector with I2C, SPI, supply, and any free I/O pins, and add the IRQ to that.
I like this approach!
- There's already a reset button for the FPGA, but we can have a separate one for the CPU, or attach a button to the FPGA for any user defined function. Another idea is to add a few shift registers, and add a bunch of leds and push buttons/toggle switches on the SPI bus.
Either approach sounds good to me. So SW1 resets the FPGA I take it?
- For the USB, I was planning a dual type "A" stacked connector, attached to FPGA. I don't have any HDL model or code written yet. So, yes, the hardware is ready to support USB host mode, but there's still a lot of work to do before it can actually do that. Support for USB hubs will be very low on my personal to-do list
I get it. It would be low on my list too, except that I'd like to have support for a USB or PS/2 keyboard. What are your thoughts on supporting keyboards?
Re: Enhanced Dynamically Reconfigurable Systems Using CPLD/F
Posted: Thu Nov 05, 2015 6:31 pm
by jmp(FFFA)
Oh, one more suggestion. Consider putting vias or test points on the unconnected pins of the 65C02/65C816 to make it easier to connect to them should a use be discovered for them in the future.
Re: Enhanced Dynamically Reconfigurable Systems Using CPLD/F
Posted: Thu Nov 05, 2015 7:55 pm
by Arlet
Either approach sounds good to me. So SW1 resets the FPGA I take it?
It starts a new configuration cycle, so it loads everything from flash, and starts running. During the initialization, the FPGA resets the CPU. However, it will also restart all the other peripherals, and clear the internal memory, so not necessarily always what you want.
What are your thoughts on supporting keyboards?
As far as I know, most keyboards will accept PS/2 protocol on their USB connector. That should be simple to implement, so we can start with that. Implementing a USB host, plus HID layer would be a bit more complicated. Still, a USB keyboard is a relatively simple device, as far as USB devices go.
Re: Enhanced Dynamically Reconfigurable Systems Using CPLD/F
Posted: Thu Nov 05, 2015 8:01 pm
by BigDumbDinosaur
ABORTB is useful for trapping memory access violations in a protected mode environment, as well as catching "privileged" instructions. If you don't connect it be sure to pull it up to Vcc.
It's also possible to generate such traps using the NMI pin, but then send the ABORT vector instead.
However, trapping with NMI causes the MPU to resume on the next instruction, whereas trapping with ABORT causes the MPU to re-execute the same instruction. The reasoning has to do with ABORT's use for managing a virtual memory environment.
Re: Enhanced Dynamically Reconfigurable Systems Using CPLD/F
Posted: Thu Nov 05, 2015 8:04 pm
by jmp(FFFA)
However, trapping with NMI causes the MPU to resume on the next instruction, whereas trapping with ABORT causes the MPU to re-execute the same instruction. The reasoning has to do with ABORT's use for managing a virtual memory environment.
Was there ever a commercial or otherwise well-known VM OS for the 65816?
Re: Enhanced Dynamically Reconfigurable Systems Using CPLD/F
Posted: Thu Nov 05, 2015 8:37 pm
by Arlet
However, trapping with NMI causes the MPU to resume on the next instruction, whereas trapping with ABORT causes the MPU to re-execute the same instruction. The reasoning has to do with ABORT's use for managing a virtual memory environment.
True, but for the purpose of trapping memory access violations or privileged instructions, that shouldn't matter much. It would be useful for virtual memory, but with up to 64MB RAM on board, a VM system wouldn't add much.
Re: Enhanced Dynamically Reconfigurable Systems Using CPLD/F
Posted: Thu Nov 05, 2015 10:43 pm
by BigDumbDinosaur
Was there ever a commercial or otherwise well-known VM OS for the 65816?
I'm not aware of one, although the Apple ][gs may have had some elements of it in its OS.
Re: Enhanced Dynamically Reconfigurable Systems Using CPLD/F
Posted: Fri Nov 06, 2015 2:39 am
by Tor
As far as I know, most keyboards will accept PS/2 protocol on their USB connector. [..]
I've seen quite a few members of various hobby sites running into keyboards which won't work with PS/2. It looks like these days the PS/2 compatibility is not always included.
-Tor
Re: Enhanced Dynamically Reconfigurable Systems Using CPLD/F
Posted: Fri Nov 06, 2015 6:51 am
by Arlet
Got video routed (except for 1.8V LDO and I2C, but those are easy). Lots of tight spots
I decided to implement VGA using 4 resistors (499R, 1K, 2K, and 4.02K). That's good enough for our purposes, and these resistor values are still fairly common.
J6 is the VGA connector, and J7 is the PAL/NTSC connector, implemented using 3.5 mm three-ring jack.
My plans for the connector layout - on the back: VGA, TV, Audio and mini USB power in. On the right: USB, uSD card, UART and extension header. I'll probably shift the VGA connector to the left, and make the board slightly longer on the right. Probably 9x8 cm, or maybe even 10x8 cm.
Re: Enhanced Dynamically Reconfigurable Systems Using CPLD/F
Posted: Fri Nov 06, 2015 4:36 pm
by jmp(FFFA)
Arlet, please have a look at these parts for the power supply:
http://search.murata.co.jp/Ceramy/image ... /2HN_E.pdf
They are tiny self-contained modules with DC-DC converters on them not much larger than a linear converter like the one you are using. Prices are about the same as the linear regulators too. Maximum current is 600 mA for these, though if that's not enough there are larger modules available too. Digikey carries these, so I imagine they are easy to get from many suppliers.
You'd need three of them -- one for each output voltage required.
If the 4-SMD package is a problem to solder, Altera and TI make similar (but more expensive) parts in QFN-14 and LLP-8 packaging with exposed pads. However, I have hand-soldered other 4-SMD packages before and found it not too difficult. And if you're planning on reflowing the boards, it certainly won't be an issue at all.
Re: Enhanced Dynamically Reconfigurable Systems Using CPLD/F
Posted: Fri Nov 06, 2015 6:19 pm
by Arlet
These DC/DC converters are very nice, but Digi-Key only has the 3.3V in stock. Farnell doesn't have any of them. Mouser doesn't have the 1.2V in stock either.
Re: Enhanced Dynamically Reconfigurable Systems Using CPLD/F
Posted: Fri Nov 06, 2015 6:35 pm
by jmp(FFFA)
These are slightly more expensive, but are programmable so you don't have to worry about picking up different parts for different voltages:
http://www.ti.com/lit/ds/symlink/lmz10500.pdf
Additionally, the Altera parts are another option too:
https://www.altera.com/content/dam/alte ... _05721.pdf
Both of the above are in-stock at Digikey now.
Re: Enhanced Dynamically Reconfigurable Systems Using CPLD/F
Posted: Fri Nov 06, 2015 7:47 pm
by Arlet
I've seen quite a few members of various hobby sites running into keyboards which won't work with PS/2. It looks like these days the PS/2 compatibility is not always included.
Going directly for USB is an option too. It's not really all that complicated, provided the 6502 can do the higher level functions, such as configuration. After that, it's just a matter of repeatedly sending the same packet every millisecond. If the reply contains data, store it in memory, and interrupt the CPU. Otherwise, ignore it.