WDC 65C02P-8

kc5tja · Post by **kc5tja** » Wed Nov 03, 2010 3:38 am

OK, to help us all be clear on the test cases, I've amended the QA matrix. Please let me know if I missed anything.

#   - CPU     -  Speed   - RAM (ns) - EPROM version - Works ?
--------------------------------------------------------------------
1   - W65C02  -   10    -   100    -     1.1       -  ok
2   - W65C02  -   10    -    70    -     1.1       -  ok
3   - W65C02  -   10    -    70    -     10        -  wrong LED flashing
4   - G65SC02 -    5    -    70    -     10        -  ok (but some garbage from time to time)
5   - W65C02  -    5    -    70    -     10        -  wrong LED flashing (??)
--------------------------------------------------------------------

By process of elimination, it looks to me the problem is that the V10 build of the software is making use of some kind of instruction set differences between a normal 6502 and CMD's enhanced offerings. The following datasheet contains an opcode matrix markedly different from WDC's.

http://www.datasheets.org.uk/pdf-datash ... 27541.html

What baffles me, though, is WDC's site indicates full compatibility. Assuming this to be true, logic says that the V10 chess software makes use of undocumented opcodes supported by the CMD part, but which behave differently on the WDC part.

If we go on the assumption software compatibility is not an issue, I suspect an oscilloscope and/or logic analyzer is the next step, for the errors occuring must be electrical in nature.

ricard60 · Post by **ricard60** » Wed Nov 03, 2010 4:31 am

Thanks kc5tja the matrix is ok now.

kc5tja wrote:

WDC's site indicates full compatibility.

I believe this is not true; to run with this new W65C02 i have to put a resistance of 4.7 Kohms between pins 36 and 8 and have to bend away pin 38, don´t ask me why this was told to me from another forum.

best regards
Ricardo

kc5tja · Post by **kc5tja** » Wed Nov 03, 2010 4:34 am

"running with full compatibility" refers to software, not hardware, interfaces.

Although, as I indicated above, I question even the claim of full software compatibility.

To find out why you need to tweak the hardware interface, you will need to read the CMD and WDC data sheets and observe how the various pins differ between the parts.

ricard60 · Post by **ricard60** » Wed Nov 03, 2010 11:42 pm

Thanks kc5tja ,
So maybe i still have to bend away another pin or put another resistance between some pins or something like this?

regards
Ricardo

GARTHWILSON · Post by **GARTHWILSON** » Thu Nov 04, 2010 4:48 am

Bend pin 1 away, because it's a vector-pull output instead of ground.
Pin 36 is bus enable, but it has an internal weak pull-up, so it should be ok without the external pull-up. It wouldn't hurt to give it a stronger pull-up though.
Pin 5 is the memory-lock output. If your board leaves it disconnected, it should be fine.
Pin 38 is still SO\ input, so nothing is different there.

ricard60 · Post by **ricard60** » Sat Nov 06, 2010 1:29 am

Hi GARTHWILSON,
I also did a pull up on pin 2 because somebody from WDC told me to do it, but i still get a wrong flashing led. I am starting to believe that maybe there is some software compatibility problem.