6502.org

The wind-down of C256Foenix was announced yesterday. https://mailchi.mp/12b4b4c9c6e4/c256-fo ... 020-update

(welcome, picosecond)

> wind-down of C256Foenix

That's certainly a shame. These retro-remakes really are major and difficult projects. And it's one thing to note that you can't make everyone happy, quite another thing to see that people bring grief to a project that doesn't quite fit their views.

For me, enthusiasm and energy are the most fragile and valuable resources. Which is why I keep saying, if you don't see the merit in a project, ignore it. Leave it to the people who do see the merit, to enjoy themselves, and see where they can get to.

In other words, if someone here can see the emperor has no clothes he should keep his mouth shut and not point out the obvious because we shan't discourage someone from embarrassing themselves in public. Got it!

Don't be wrong-headed about this, Ed. Peer review is part of the process and if one of those peers thinks the project is headed to failure, that individual should speak up in a respectful manner and explain why he feels so. That's what Garth was subtly doing in his earlier posts, in which he correctly pointed out that most of Proxy's objectives were already embodied in the 65C816. I'm not as subtle in that regard as Garth, but then I've never felt compelled to award participation trophies.

I'll leave you with a question. If the idea of turning the 6502 into a super-processor has as much merit as you suggest, why didn't WDC push forward with the 65C832?

I could turn the poroject into a pure 6502 or 65C02, so the only actual difference would be the improved cycle times.
which i think would be useful for any FPGA based project?

i mean we got a datasheet of the 65CE02, isn't that enough to make a functionally identical version of it?
i can try to atleast... after i finish my pure 6502/65C02 of this. because even looking at the 65CE02 datasheet i can see that those cycle times are still a tiny bit slower than what i can do...

There's a thread on the 65CE02 reverse-engineering here:
viewtopic.php?f=1&t=4954

BDD, if you think the correct response to any kind of CPU-constructing or CPU-extending project is to say that WDC made the last word in microprocessors and no-one need do any more than they have, you'll be well out of tune with anyone who does want to pursue such a project, and yes, you should stay out of the thread.

Clarke's Law:

It really would be good for us to get back into the habit of seeing threads as topics - link to a thread then use it. Otherwise every single discussion goes off-track.

I never said anything in this topic was impossible, you are not Arthur Clarke and also are not in charge around here. So don't be telling me to stay out of anything.

I seldom use the word "impossible" in technology discussions and didn't here. What I did point out was most projects of this type are doomed to failure, usually due to overwhelming complexity. That's not the same as saying it's impossible.

I suggest you re-read my question about the 65C832. At no point did I say WDC was the last word in microprocessors. The question pertained to why WDC didn't see fit to extend the 6502 to a 32-bit design. I think the point I was trying to make with that question got past you.

Incidentally, this is supposed to be a website and forum about 6502-family MPUs. I'd like to see it stay that way. If you want to see topics about building Frankenstein microprocessors then you are encouraging content dilution.

The short answer is: they designed it, nobody wanted to buy it, so they didn't bother sending it to the fab.

Probably because nobody wanted a "32-bit" CPU without a built-in multiplier, was awkward to code for, and which took several cycles to do anything - not when you could just as easily get a 68020, ARM2 or 80286 to outperform it. The 65816, as a mere "16-bit" CPU, could just about get away with those limitations, as the 24-bit address space and 65C02 compatibility were the major selling points.

The 65CE02 was an extension to the 6502 in a different direction, adding processing capabilities rather than raw address space. Prototypes were made (as Commodore had an in-house fab) but the computer it was intended for was cancelled. Probably because nobody wanted a CPU that could only comfortably address 64KB, even if it was faster and more capable than a 6502.

As a relative newcomer to these parts, I'm rather dismayed by direction and tone of this thread. Just so I'm clear, you are saying the original subject matter of this thread is inappropriate? That's helpful to know, and I'll bear this in mind when considering where/what to contribute in the future.

Dave

I rather hope that one or two strident voices don't knock the wind out of this forum. Once we get to know the characters here, we know what to expect. My concern is for newcomers, who might mistake an opinion for a consensus.

Mike, who started the forum, owns the infrastructure, and surely maintains a keen interest in it continuing to serve 6502 fans of all stripes, not so long ago said this:

I'm sorry if i caused any kind of beef or conflict between some people... I didn't mean to do that.
I just thought of ideas to improve the 6502 but failed at finding any existing CPUs that already did such things. which is my own fault.
before this thread never even heard of the 65CE02, and i didn't bother looking more into the 65816 because honestly i don't really care that much about it.

the project basically changed to get rid of the point 3. of my "goals" list.
so now i'm just building a straight up 6502, with the only difference being the internal architecture, and improved cycle times.
after that i want to tackle the 65C02 with the same goal, and after that, maybe even the 65CE02.

Also welcome, picosecond! I'm sorry your first post had to be on such a mess of a thread.

Thanks for the welcome, BigEd and Proxy. Sometime soon I will get off my duff and make a proper greeting in the Introduce yourself thread. Here is a one-liner: I have worked professionally designing custom ASICs for more than three decades, but I have never designed a CPU.

Proxy, I don't think your thread is a mess and I am not put off by a little squabbling. If I may, here are some poorly organized thoughts on your project:

There are already numerous 65xx cores that can be used in FPGA applications but I think there is ample room for innovation. None of the cores I have looked at are particularly small. I think a minimal-area core is an interesting design challenge. And of course, the sky is the limit in the high-frequency / high-IPC direction.

For me, instruction compatibility with the original 6502 is not very interesting or useful without also having clock cycle compatibility. Since improved IPC is one of your goals I would forget about the original and start with the 65C02 as a baseline. Get that working on some FPGA dev board before adding new instructions/features. There are many design trade-offs to consider for this seemingly simple (but definitely not) project. For starters, do you optimize for embedded or external RAM? Do you emphasize portability or optimize for a specific FPGA family?

If you are more interested in exploring instruction sets in simulation and less interested in ultimately building something these thoughts are probably not helpful. Maybe we find fun in the same things, maybe we don't. By all means, focus on what floats your boat.