Re: 65C816 hardware design ideas?
Posted: Mon Oct 22, 2018 8:09 pm
drogon wrote:
That doesn't use more than 64K of the memory space, although the flash rom is 128K it seems to be banked in 32K sections. (which is interesting in it's own right) The real thing I was after was other peoples ideas and usage of the upper 8 bit latch to expand memory > 64K, but I think I have a good handle on that now, thanks.
Address decoding and whatnot isn't much of an issue, but I've changed tact slightly due to what I plan for it as the '816 will run my applications a lot better than the c02 ever did.
Address decoding and whatnot isn't much of an issue, but I've changed tact slightly due to what I plan for it as the '816 will run my applications a lot better than the c02 ever did.
And while it does not utilize more than 64K, it's decoding the banks properly (if perhaps hamfistedly) with the big NOR gate.
But the decode logic is one of the reasons I'm drawn toward the W65C265SXB, because it does decode large chunks of the 16MB space. It has other issues, but getting a 1MB+ system up with some rudimentary I/O is (seems) pretty simple.
If the circuit tools didn't completely vex me, I'd lay something out.
The banking of the Flash chip makes it easy for you to try to do development and prototyping on the board as is. The flash can be programmed on board, by the CPU, so you could readily create a simple driver that takes a serial download to one of the other flash banks.
But as a spec circuit, you can just eliminate all of that.
The suggestion isn't to use the system as is, but as a reference design to study and pick and choose as you will.