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Re: Scrolling an SSD1306 OLED in 6502 assembly
Posted: Sun Nov 12, 2023 10:38 pm
by AndersNielsen
Thought you might enjoy this. I was wondering if it's possible to fit an ICSP (In-Circuit-Serial-Programming) program into the 128 bytes of RIOT RAM on modified 65duino hardware. The attached file contains clumsy, untested, and probably buggy code, and while the ICSP process has a few limitations and caveats, I'm kinda' geeked to see what you can fit in 128 bytes.
Regards, Mike
Oh that's amazing and very nicely organized code! And it doesn't look like it's hard to make it fit. The way I've got it setup now it's overflowing by 15 bytes because I reserve some RAM for variables at the bottom and some for stack.. But we don't need the variables to survive a programming cycle anyway and I'm not sure it absolutely needs to be defined as a separate memory segment.
I must try this as soon as I have a chance - it looks like it should work
Thank you for the help!
Alternatively it's possible to make the "dance" by connecting A10->A12->A14 and A11->A13 ... if you're willing to sacrifice even more ROM space of course. It'll look strange if you dump the ROM but you should still have the "full" 4096 bytes of ROM space.. And of course it'll have to be programmed with that in mind initially.
Re: Scrolling an SSD1306 OLED in 6502 assembly
Posted: Mon Nov 13, 2023 12:27 am
by Michael
Oh... Let me study that address scheme. If you're going to span several sectors I imagine you would need to do a 'chip erase' instead of a 'sector erase', which would require a 100-msec delay instead of a 25-msec delay. Excerpt;
Code: Select all
; ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
; ~ wrByte() ~ programming ROM on a modified 65uino design ~
; ~ ~
; ~ force ROM writes to the decoded $1XXX address space and ~
; ~ set A12/A13/A14 ROM address lines to 'spoof' the $2AAA ~
; ~ and $5555 command addresses using RIOT PB0 to drive A12 ~
; ~ and A14 and PB1 to drive A13. The 4K $0XXX ROM sector ~
; ~ is used for data and is mapped to $1XXX address space. ~
; ~ ~
; ~ first entry performs 'erase sector' operation while all ~
; ~ subsequent entries perform 'program byte' operations. ~
; ~ ~
; ~ erase sector erase chip program byte ~
; ~ wr($5555,#$AA) wr($5555,#$AA) wr($5555,#$AA) ~
; ~ wr($2AAA,#$55) wr($2AAA,#$55) wr($2AAA,#$55) ~
; ~ wr($5555,#$80) wr($5555,#$80) wr($5555,#$A0) ~
; ~ wr($5555,#$AA) wr($5555,#$AA) wr($addr,data) ~
; ~ wr($2AAA,#$55) wr($2AAA,#$55) delay 20 usecs ~
; ~ wr($addr,#$30) wr($5555,#$10) ~
; ~ delay 25 msecs delay 100 msecs ~
; ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Re: Scrolling an SSD1306 OLED in 6502 assembly
Posted: Mon Nov 13, 2023 1:43 am
by Michael
Alternatively it's possible to make the "dance" by connecting A10->A12->A14 and A11->A13 ... if you're willing to sacrifice even more ROM space of course. It'll look strange if you dump the ROM but you should still have the "full" 4096 bytes of ROM space.. And of course it'll have to be programmed with that in mind initially.
If I understand correctly, this method is actually "genius". It eliminates the need for any RIOT I/O pins (yay!) and should significantly reduce ICSP code 'overhead'. As for programming... all write operations go into ROM address space ($1000..$1FFF) or shadows ($3xxx, $5xxx,...$Fxxx). Write to $1AAA for $2AAA and write to $1555 for $5555. Do not try to write to $2AAA because that address is a shadow of the 4K RIOT address space (decodes to $0AAA).
Cheerful regards, Mike
<added>
BTW, revised code is 99 bytes which is kinda' cool but the fragmented ROM is a bit too exotic for me.
Please don't get carried away trying that code. I exit the serial Rx routine after sampling the middle of the 8th bit and I need to make sure that a little more than another half-bit time elapses before re-entering that routine. Some other subtle considerations, too. I apologize. I was initially just interested to see if example code could fit in 128 bytes. The program will need more work if someone actually wants to try and use it.
Code: Select all
; ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
; Ander's suggestion to connect A10->A12->A14 and A11->A13
; reduces 'overhead' considerably by spreading the 4kB ROM
; address space across 4 ROM sectors ($0XXX, $2XXX, $5XXX,
; and $7XXX) in a way that allows the ROM to recognize the
; $2AAA and $5555 command addresses by writing to $1AAA &
; $1555 in normal decoded ROM address space (or shadows).
;
; ---ADDR--- A14 A13 A12 A11 A10 A09 A08 -ROM SEES-
; 1000..13FF 0 0 0 0 0 x x 0000..03FF
; 1400..17FF 1 0 1 0 1 x x 5400..57FF
; 1800..1BFF 0 1 0 1 0 x x 2800..2BFF
; 1C00..1FFF 1 1 1 1 1 x x 7C00..7FFF
;
Re: Scrolling an SSD1306 OLED in 6502 assembly
Posted: Mon Nov 13, 2023 8:45 am
by AndersNielsen
Alternatively it's possible to make the "dance" by connecting A10->A12->A14 and A11->A13 ... if you're willing to sacrifice even more ROM space of course. It'll look strange if you dump the ROM but you should still have the "full" 4096 bytes of ROM space.. And of course it'll have to be programmed with that in mind initially.
If I understand correctly, this method is actually "genius". It eliminates the need for any RIOT I/O pins (yay!) and should significantly reduce ICSP code 'overhead'. As for programming... all write operations go into ROM address space ($1000..$1FFF) or shadows. Write to $1AAA for $2AAA and write to $1555 for $5555. Do not try to write to $2AAA because that address is a shadow of the 4K RIOT address space (decodes to $0AAA).
Cheerful regards, Mike
<added>
BTW, revised code is 99 bytes which is kinda' cool but the fragmented ROM is a bit too exotic for me.
Please don't get carried away trying that code. I exit the serial Rx routine after sampling the middle of the 8th bit and I need to make sure that a little more than another half-bit time elapses before re-entering that routine. Some other subtle considerations, too. I apologize. I was initially just interested to see if example code could fit in 128 bytes. The program will need more work if someone actually wants to try and use it.
Code: Select all
; ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
; Ander's suggestion to connect A10->A12->A14 and A11->A13
; reduces 'overhead' considerably by spreading the 4kB ROM
; address space across 4 ROM sectors ($0XXX, $2XXX, $5XXX,
; and $7XXX) in a way that allows the ROM to recognize the
; $2AAA and $5555 command addresses by writing to $1AAA &
; $1555 in the normal decoded ROM address space.
;
; ---ADDR--- A14 A13 A12 A11 A10 A09 A08 -ROM SEES-
; 1000..13FF 0 0 0 0 0 x x 0000..03FF
; 1400..17FF 1 0 1 0 1 x x 5400..57FF
; 1800..1BFF 0 1 0 1 0 x x 2800..2BFF
; 1C00..1FFF 1 1 1 1 1 x x 7C00..7FFF
;
Yeah, it's a funky way of doing it and when the 6507 tries to access FFFC (from 1FFC) ROM needs to have the code available there initially. I guess the easy way is to just duplicate the whole ROM 8 times initially - and when doing ICSP erase the four sectors and the 650X will automatically write it in the right sectors. I guess?
It shouldn't be too hard to mod a rev 0 65uino to do it - and for the next revision it wont be too hard to stuff a '00 underneath one of the DIPs.