65816 EMU Pin and WS2812B Digital LEDs

[BigEd]

A flickering fire animation? Something very large but scrolling around?

Some ideas here https://www.youtube.com/watch?v=UZW3PJk7fy4

Maybe a selection of elementary 1D cellular automata (with time as the second dimension)?
https://en.wikipedia.org/wiki/Elementar ... omplements

[Dr Jefyll]

AndersNielsen wrote:

I managed to drive a strip of WS2812B’s with a 2mhz 6502

…and a shift reg.

https://abnielsen.com/2021/12/23/ws2812 ... on-a-6502/

Welcome, Anders -- and nice work!

Quote:

the [shift register of the] 6522 supplies data at a comfortable rate of 1 Mhz and the 74HC165 shifts out the converted data at 8 Mhz, which means the bit rate is right around 1bit per microsecond

-- Jeff

[AndersNielsen]

Dr Jefyll wrote:

Welcome, Anders -- and nice work!

Thank you - it was a fun exercise

[Sheep64]

plasmo: I'm out-classed. You've discovered that M/X and EMU can be used fairly interchangeably for UART output and digital LED output. I suggest that analog servo control may also use M/X and EMU. Indeed, I have an application in mind. The Necomimi EEG Cat Ears (advert, tutorial) use a three points of skin contact to read the alpha waves of concentrated thought. This provides the input for autonomous animatronic ears.

plasmo: A suggested use for a 16*16 digital LED matrix is breakpoint output. Matrix wiring is typically serpentine where one row runs left-to-right and the next row is right-to-left. This keeps the wiring short but has the side effect the odd and even rows are rastered in opposite directions. Regardless, it should be possible to dump, for example 8 bit RegA, 8 bit RegX and 16 bit Program Counter every time a routine is called or every time /NMI is activated. A 16*16 matrix will display the values from the last eight calls.

AndersNielsen: You have great potential. I really like your shift register scheme. People commonly use shift registers in video circuits but this case typically requires a shift register to never omit a bit and never run dry. Your usage of a shift register with 2MHz 6502 works in the opposite case to de-couple processor speed and pulse width. This is also useful in other applications, such as EEPROM programming. The de-coupled arrangement is most tolerant and responsive to interrupts. Specifically, a shift register may be emptying while an interrupt is processed.

Actually, I left the interrupt placement unspoken. The NeoPixel library places interrupt masks around short pulses only. Long pulses may exceed timing although interrupts must not exceed 6000ns (or whatever vague timeout value is implemented; possibly 50000ns). Best placement of an interrupt mask depends upon the frequency and complexity of the expected interrupts. In the general case, shifting a full chain of LEDs may be one atomic operation. For restricted decorative applications, shifting 24 bits (or 32 bits) should be atomic. For brief interrupts, such as counters, short pulses should be atomic. With AndersNielsen's shift register arrangement, where one or three high bits are sent at a multiple of the processor clock speed, interrupt mask may be skipped entirely.

BigEd on Wed 29 Dec 2021 wrote:

A flickering fire animation?

I want to make a Iron Man arc reactor tshirt. It would be a black short sleeve tshirt with a hidden pocket which allows the electronics to be removed prior to washing. The electronics consist of a processor and a ring of digital LEDs. The processor runs an automata to simulate a miniature fusion reaction. If you get the simulation correct, the LEDs will ripple and ring tail like an uneven containment of fusion. And, obviously, it will glow in the dark. The Iron Man 1970s rock sound track is supplied separately.

BigDumbDinosaur on Sun 3 Oct 2021 wrote:

Just think if M/X had instead been rigged up so it was asserted when the effective address is in bank $00.

You're wiring it wrong. Use the EMU pin rather than the M/X pin. Specifically, Connect a clock divider to the EMU pin. Connect ROM, I/O and maybe a small amount of scratch RAM to one or two 74x138 with an active high enable from the EMU pin. Connect bulk RAM to one or two 74x138 with an active low enable from the EMU pin. (For maximum speed, don't decode the upper, multiplexed address lines.) Add some tri-state latches to shadow the ROM into the RAM. You now have 257 banks of memory. Bank minus one allows slow ROM and I/O access. Bank 0-255 permits 16MB of fast, contiguous RAM. Variants allow separate enables for program and data - or allow unified memory to be banked switched vastly beyond 16MB.

If you require 14MB RAM or less and contiguous memory is a secondary consideration, it is possible to implement a simplified scheme possibly using only two discrete chips.