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Re: Help with ADC/SBC and Carry/Overflow Flags
Posted: Tue Oct 06, 2020 5:55 pm
by BillG
How is multi-byte subtraction a pain on the 6800 any more than other processors?
This code does not know or care about the gender of the carry/borrow flag. Don't ask; don't tell...
Code: Select all
0000 00001 X rmb 4
0004 00002 Y rmb 4
0008 00003 Z rmb 4
00004
000C 96 03 [3] 00005 ldaa X+3
000E 90 07 [3] 00006 suba Y+3
0010 97 0B [4] 00007 staa Z+3
0012 96 02 [3] 00008 ldaa X+2
0014 92 06 [3] 00009 sbca Y+2
0016 97 0A [4] 00010 staa Z+2
0018 96 01 [3] 00011 ldaa X+1
001A 92 05 [3] 00012 sbca Y+1
001C 97 09 [4] 00013 staa Z+1
001E A6 00 [5] 00014 ldaa X
0020 92 04 [3] 00015 sbca Y
0022 97 08 [4] 00016 staa Z
Edit: replaced add code with subtract, not that it looks all that different...
Re: Help with ADC/SBC and Carry/Overflow Flags
Posted: Tue Oct 06, 2020 5:58 pm
by BigEd
It's possible I extrapolated incorrectly! Does subtraction work as nicely as addition?
Re: Help with ADC/SBC and Carry/Overflow Flags
Posted: Tue Oct 13, 2020 6:14 pm
by litwr
I have asked Harry Bawcom -
https://youtu.be/F-YubkAo-r8?t=29144
I also asked Bill Mensch -
https://www.youtube.com/watch?v=F-YubkAo-r8&t=33268
So maybe there are no men who knows the answer.

Maybe only Chuck knew it - he was the only designer of the 6502 ISA.
Re: Help with ADC/SBC and Carry/Overflow Flags
Posted: Tue Oct 13, 2020 6:39 pm
by BigEd
Yes, Chuck would probably have been the best bet. Unfortunately, Bill misunderstood the question and started talking about shifts.
Re: Help with ADC/SBC and Carry/Overflow Flags
Posted: Tue Oct 13, 2020 9:25 pm
by GARTHWILSON
The inverted carry makes perfect sense if you think about how the 65xx processors do subtraction (and a compare is just a subtraction that neither uses C as an input nor keeps the answer, only the flags). The process was described on the first page of this topic. When you do A minus B, it inverts all the bits of B and adds them, with carry, to A, using the same circuitry. If you don't add 1, the answer will be short by 1, and that's what happens if C was clear because of a previous instruction's result.
Re: Help with ADC/SBC and Carry/Overflow Flags
Posted: Wed Oct 14, 2020 6:20 pm
by litwr
The inverted carry makes perfect sense if you think about how the 65xx processors do subtraction (and a compare is just a subtraction that neither uses C as an input nor keeps the answer, only the flags). The process was described on the first page of this topic. When you do A minus B, it inverts all the bits of B and adds them, with carry, to A, using the same circuitry. If you don't add 1, the answer will be short by 1, and that's what happens if C was clear because of a previous instruction's result.
It is perfectly clear. Why have you repeated this? There is another thing which is unclear. The 6502 was probably the first processor which used the inverted carry after subtraction and comparison. So when Intel's, Zilog's, DEC's, Moto's people check the carry equality to zero, the 6502's people have to check the carry equality to 1. So Chuck broke a kind of concept. The time shows that he was right but we still don't know his motivation. I hoped that Bill Mensch can remember it.
You have written that in order to do a subtraction/comparison we need to invert the subtrahend but we can invert the carry in the same time. It costs us only several transistors more. It is too little, about 0.1% of the total transistor count. So I can assume that there might be other reasons for this breaking of the concept than this almost absent advantage.
Re: Help with ADC/SBC and Carry/Overflow Flags
Posted: Wed Oct 14, 2020 6:35 pm
by BigEd
If it's any extra transistors at all, why is it worth doing? The machine works fine as it is.
Re: Help with ADC/SBC and Carry/Overflow Flags
Posted: Wed Oct 14, 2020 8:10 pm
by GARTHWILSON
The inverted carry makes perfect sense if you think about how the 65xx processors do subtraction (and a compare is just a subtraction that neither uses C as an input nor keeps the answer, only the flags). The process was described on the first page of this topic. When you do A minus B, it inverts all the bits of B and adds them, with carry, to A, using the same circuitry. If you don't add 1, the answer will be short by 1, and that's what happens if C was clear because of a previous instruction's result.
It is perfectly clear. Why have you repeated this?
From your question in the video conference, it sounded like you thought the 6502 method made no sense, and so why was it done this way. That question was answered on the first page here, but I know sometimes just putting the answer a different way is all it takes to make the light go on.
There is another thing which is unclear. The 6502 was probably the first processor which used the inverted carry after subtraction and comparison. So when Intel's, Zilog's, DEC's, Moto's people check the carry equality to zero, the 6502's people have to check the carry equality to 1. So Chuck broke a kind of concept. The time shows that he was right but we still don't know his motivation.
I don't think it's unclear at all. Although I did not know the internal workings when it was presented in that class that introduced me to the 6502 in 1982 (and I figured it somehow made the design easier), I never had any trouble with it.
Re: Help with ADC/SBC and Carry/Overflow Flags
Posted: Thu Oct 15, 2020 6:15 am
by litwr
From your question in the video conference, it sounded like you thought the 6502 method made no sense, and so why was it done this way. That question was answered on the first page here, but I know sometimes just putting the answer a different way is all it takes to make the light go on.
I don't think it's unclear at all. Although I did not know the internal workings when it was presented in that class that introduced me to the 6502 in 1982 (and I figured it somehow made the design easier), I never had any trouble with it.
Thank you! I have finally gotten your point. You have assumed that I assumed something wrong about the 6502 like your words "no sense". No! I am still just curious about this. I have written afore that this inverted carry sometimes gives significant advantage so it definitely has some sense. Thus it is quite normal that you haven't had any trouble with the carry. However I can point a case where it can be a bit confusing. It is about the use of other assemblers. If you make a comparison and want a jump if it is "less than" you have to use BCC on the 6502 but BCS on the 680x or 68k (JC on the z80 or x86). In 1975 it was not easy to break the common rule about the carry, so Chuck made a kind of a revolution!

It is sad that my question sounded the way you mentioned. My question to Bill Mensch has been
If you could help me to understand why the 6502 generates the inverted carry after compare and subtraction instructions. It was an absolute novelty in 1975. Intel, DEC, Motorola processors don't invert the carry in such cases. Thank you
Is there anything embarrassing in it?