6502.org

The Forth programming language Next loop has about seven lda and sta to the W and IP interpreter variables. Those variables are always hosted in zero-page addresses for speed and for indirect threaded Forth's the jmp in that loop is self-modifying as well. I have heard that some Forths put the entire Next loop in zero page and given what BDD said it's for the lda and sta operations, including the ones that modify the jmp target. In the Fig Forth source, they only put the jmp instruction in zero page and jmp to it from higher addresses.

I guess the takeaway is that a tight loop of self-modifying code might benefit from being hosted in zero page. But that's because the code itself is the target of lda and sta instructions.

That's pretty much the situation with CHRGET in Microsoft BASIC. But it's an unusual situation, and not true of most code.

Yep!  MS BASIC’s CHRGET increments the embedded text address before reading from it, so the INC instructions benefit from zero page addressing.  That is the only real gain in performance due to CHRGET being on zero page.

BTW, recall that if the routine is entered at CHRGOT, the increment-address step is bypassed, so there is no practical performance gain.  However, CHRGET is heavily used as a program is interpreted, which more than justifies placing the routine on zero page.  Contrast that with the C-128’s CHRGET, which uses indirection to read BASIC text, and along with all the memory map gyrations that are going on, is slower than the C-64, even when the C-128 is running in FAST mode.

As I was typing my post a couple of days ago, my typing seemed very familiar. It was, it's a routine in some demo code for a simple text mode screen display, copies a line from (),Y to (),X down to either meeting 0 first: