Question IRQ interruption during BRK execution .

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BigEd
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Re: Question IRQ interruption during BRK execution .

Post by BigEd »

For comparison, Acorn's MOS does the same thing in both the early 6502 and later 65C02 versions:

Code: Select all

 irqEntryPoint = $dc1c
    STA .interruptAccumulator                           save A
    PLA                                                 read flags
    PHA                                                 store flags again
    AND #%00010000                                      check BRK flag
    BNE .brkRoutine                                     if (BRK flag set) then branch (to
                                                        BRK handler)
... and on into the IRQ handler
This is nice and fast, but (perhaps notably) not re-entrant. Whether the ISR should be re-entrant is of course a system design decision.
JimBoyd
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Joined: 05 May 2017

Re: Question IRQ interruption during BRK execution .

Post by JimBoyd »


For comparison this is a portion of the Commodore 64's interrupt service routine.

Code: Select all

FFFE @ DIS 
 FF48         PHA
 FF49         TXA
 FF4A         PHA
 FF4B         TYA
 FF4C         PHA
 FF4D         TSX
 FF4E  104 ,X LDA
 FF51   10  # AND
 FF53 FF58    BEQ
 FF55  316  ) JMP
 FF58  314  ) JMP
13 
 OK
CONSOLE 

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barrym95838
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Location: Sacramento, CA, USA

Re: Question IRQ interruption during BRK execution .

Post by barrym95838 »

BigEd wrote:
For comparison, Acorn's MOS does the same thing in both the early 6502 and later 65C02 versions:

Code: Select all

 irqEntryPoint = $dc1c
    STA .interruptAccumulator                           save A
    PLA                                                 read flags
    PHA                                                 store flags again
    AND #%00010000                                      check BRK flag
    BNE .brkRoutine                                     if (BRK flag set) then branch (to
                                                        BRK handler)
... and on into the IRQ handler
This is nice and fast, but (perhaps notably) not re-entrant. Whether the ISR should be re-entrant is of course a system design decision.
Woz did somthing very similar on the Apple ][, but curiously decided to ASL ASL ASL BMI instead of AND# BNE ... it wasn't like him to seemingly "waste" a byte of ROM like that, but there you have it. He wouldn't hesitate to spend a handful of cycles to save a byte, but this is larger and slower, so I'm stumped.
Got a kilobyte lying fallow in your 65xx's memory map? Sprinkle some VTL02C on it and see how it grows on you!

Mike B. (about me) (learning how to github)
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BigEd
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Re: Question IRQ interruption during BRK execution .

Post by BigEd »

Mmm, that's a puzzler.
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