Who uses the WDC instructions for... ?

[soci]

I wanted to use them for a current project but it's annoying that with a 65C02 these are zero page bound. However the bit instructions are much more usable with a 65CE02 where the base page is movable:

Code: Select all

.0889                   irq             .proc
                                        .with io.u1
.0889   48                              pha
.088a   a9 20                           lda #pir.RCIF
.088c   2c 0f 27                        bit pir
.088f   f0 39                           beq _no_receive
.0891   7b                              tda
.0892   48                              pha
.0893   a9 21                           lda #>rcreg
.0895   5b                              tad
                                        .dpage (>rcreg) << 8
.0896   da                              phx
.0897   ae d2 08                        ldx queue.in
.089a   2f 1d 06        _lp             bbr #.FERR, rcsta, _frame_ok
.089d   a5 19                           lda rcreg
.089f   d0 15                           bne _not_break
.08a1   80 29                           bra monitor
.08a3                   _frame_ok
.08a3   a5 19                           lda rcreg
.08a5   9d cd 08                        sta queue,x
.08a8   ca                              dex
.08a9   10 02                           bpl +
.08ab   a2 04                           ldx #size(queue)-1
.08ad   4e d4 08        +               lsr queue.flag
.08b0   90 04                           bcc _not_full
.08b2   a9 13                           lda #'{XOFF}'
.08b4   85 1a                           sta txreg
.08b6                   _not_full
.08b6                   _not_break
.08b6   a9 20                           lda #pir.RCIF
.08b8   2c 0f 27                        bit pir
.08bb   d0 dd                           bne _lp
.08bd   1f 1d 04                        bbr #.OERR, rcsta, _no_overrun
.08c0   47 1d                           rmb #.CREN, rcsta
.08c2   c7 1d                           smb #.CREN, rcsta
.08c4                   _no_overrun
.08c4   8e d2 08                        stx queue.in
.08c7   fa                              plx
.08c8   68                              pla
.08c9   5b                              tad
                                        .dpage ?
.08ca                   _no_receive
.08ca   68                              pla
.08cb   40                              rti
                                        .endwith
                                        .pend

Btw. it's unfortunate that SMB/RMB/BBS/BBR mnemonics are using bit numbers while TSB/TRB/BIT need masks in the accumulator. Not too surprisingly all constants are masks to avoid a lot of pain when combining them.

Code: Select all

.211d                           rcsta           .block
>211d                                           .byte ?
=%1                             RX9D            = %1 << 0
=%10                            OERR            = %1 << 1
=%100                           FERR            = %1 << 2
                                ...

So made them a bit smarter to recognize that by a #%100 mask actually bit number 2 is meant.

Normally the mask constants are scoped to the register symbol which now resulted in unnecessary duplications when using them. E.g. "SMB #txsta.TXEN, txsta". Bothered me enough to make "SMB #.TXEN, txsta" work as well. Alternatively all symbols could have been just global with pre and postfixes to avoid collisions. Those can give visual clues not to use them with the wrong register too. But for some reason I don't like it that way.

For a 65C02 it could be arranged that e.g. half of the zero page could mirror in selected I/O chips temporarily in place of RAM. Would be surprised if anyone would go that far just to make better use of them.

[Dr Jefyll]

soci wrote:

So made them a bit smarter to recognize that by a #%100 mask actually bit number 2 is meant.

Nice touch.

Quote:

Would be surprised if anyone would go that far just to make better use of them.

Many folks do seem surprised by the notion of I/O in Z-pg. And although that's justified to a degree, let's recognize that the scarcity mentality regarding z-pg needn't always apply.

My own 65xx systems have oodles of free z-page. Because they're homebrew machines (not Commodore, Apple etc), it means I get the whole zero-page pie, rather than just whatever leftovers weren't claimed by the manufacturer's code in ROM. Also -- and importantly -- my own code mostly uses a virtual stack in z-pg to accommodate temporary variables, which means they disappear when not in use. (For more on virtual stacks, see this section of Garth's stack treatise.)

I know it's not everyone who has an environment where there's lots o' z-pg address space available. But some do have that benefit... and, like money, it does you no good unless you spend it! Since fast I/O can be quite valuable for some of my projects, I have no regrets in putting multiple VIAs in z-pg.

And it's not just the SMBn & RMBn output instructions that yield the speedup; also a boon are the BBSn & BBRn test and branch instructions. Finally, let's not forget that simple ops like LDA & STA are common for I/O, and obviously they're faster (and smaller) when addressing z-pg.

-- Jeff