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Re: Weird data bus write problem
Posted: Thu Apr 02, 2020 8:20 pm
by cjs
[This was a post on a device that would check for
three output levels, rather than just two: "0", "1" and "somewhere in between, so neither." To avoid derailing this discussion, I've moved it to its own thread:
A "Poor Man's Logic Analyzer" With TTL Threshold Detection. ]
Re: Weird data bus write problem
Posted: Thu Apr 02, 2020 8:48 pm
by GARTHWILSON
To solve this, I was inspired by an idea I saw in the second of Garth's schematics in the
Interfacing to SPI and Microwire section of his circuit potpourri page. There he uses op-amps rigged as comparators against a 2.5 V reference to light LEDs when the input voltage is above that level.
Minor correction there: The LM339 shown there is an open-collector comparator (as mentioned in note #10 below the diagram). It's not terribly fast as comparators go, but it's quite a bit faster than an LM324 is.
Re: Weird data bus write problem
Posted: Fri Apr 03, 2020 2:12 am
by Chromatix
One could even go a step further here, and test against three voltage thresholds: TTL/CMOS low, TTL high, and CMOS high.
These could be processed into a 2-bit code, synchronised with a clock and trigger, and recorded into a sample buffer, which is the essence of a logic analyser, but with some basic analogue-domain information included. If the thresholds can be adjusted by hand, this can also be made useful in an LVCMOS context.
Re: Weird data bus write problem
Posted: Fri Apr 03, 2020 9:04 am
by cjs
To avoid derailing this thread too much, I've
reposted my Octal TTL Logic Probe post as the head of a new thread, and added my further responses there (as has, already, Garth; thanks Garth!).