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Re: Simple 6502 Test System with ROM Emulator
Posted: Mon Oct 12, 2015 2:15 am
by jmp(FFFA)
Fortunately the real timings are usually quite a bit better than specified. But if you make a product to sell, you can't count on it unless you test them yourself at the extremes, like temperature. IIRC, one of the commercial 6502 computers (was it the Beeb?) was usually crashing when the ambient temperature was kind of hot, like maybe upper 80's of degrees F.
I'll keep that in mind when I put my 8-bit single-board computer up on Kickstarter and hopefully start a new retro-computer craze!
Um, make that Western Design Center.
Oops, thanks for catching that. Fixed.
The 68B50 is now hooked up and the system is spewing out "Hello, World!" at 115200 baud. Can't decide whether to bring up EhBasic or some other lightweight monitor on it or rip out the ACIA and start to work on the PIC-based UART. Guess I don't want to fun to be over too soon. Oh, I did update the initial posting with the updated (corrected) schematic in case anyone is interested.
During testing with the system earlier, I did notice my 6502 assembly is a little rusty and trying to debug machine code with a logic analyzer is more than a little bit annoying. There is a really awesome Windows-based 68000 assembler and simulator called Easy68K that I've used in the past for 68K programming. Is there anything similar to this for the 6502? I tried Michal Kowalski's assembler/simulator but the help system doesn't work on my Windows 7 computer and it didn't come with any other documentation. I wound up using 64tass instead which is excellent, but lacks a simulator.
Re: Simple 6502 Test System with ROM Emulator
Posted: Mon Oct 12, 2015 5:32 am
by BigDumbDinosaur
There is a really awesome Windows-based 68000 assembler and simulator called Easy68K that I've used in the past for 68K programming. Is there anything similar to this for the 6502? I tried Michal Kowalski's assembler/simulator but the help system doesn't work on my Windows 7 computer and it didn't come with any other documentation. I wound up using 64tass instead which is excellent, but lacks a simulator.
You'll have to dig around on the forum for it, but I did post some information about Mike Kowalski's simulator in regards to pseudo-ops and a few other things. Mike's native language is Polish, so the help file that comes with the simulator isn't going to work on most Windows installations in which English is the default.
Note that the 65C02 that is simulated is the Rockwell unit, not the WDC one. Also, the supported number bases are
@ for binary,
$ for hex and no radix for decimal. See the attached for some help. Within the simulator's editor, if you place the cursor on a pseudo-op or mnemonic and press
[Ctrl-F1] you'll get context-specific help.
Re: Simple 6502 Test System with ROM Emulator
Posted: Mon Oct 12, 2015 5:50 am
by mkl0815
I used this java based simulator in the past:
https://github.com/sethm/symon
But it emulates only the 6502 without any of the 65C02 extensions.
The py65 (
https://github.com/mnaberez/py65) simulates the 65C02 including the WDC opcodes. It has a simple emulated UART by reading from 0xF004 and writing to 0xF001 (both nonblocking).
Mario.
Re: Simple 6502 Test System with ROM Emulator
Posted: Mon Oct 12, 2015 6:34 am
by Arlet
I just use a verilog simulator to test/develop my code
Re: Simple 6502 Test System with ROM Emulator
Posted: Mon Oct 12, 2015 1:05 pm
by jmp(FFFA)
Thank you BDD for the info on Mike Kowalski's assembler/simulator. Armed with that information, I'll give it another try soon. If it's half as nice as Easy68K, I'll be extremely pleased.
The py65 (
https://github.com/mnaberez/py65) simulates the 65C02 including the WDC opcodes. It has a simple emulated UART by reading from 0xF004 and writing to 0xF001 (both nonblocking).
Thanks Mario. I'll have a look at this, too.
I just use a verilog simulator to test/develop my code
Um, debugging with modelsim sounds suspiciously like debugging with a logic analyzer! I guess I'm not the only masochist here (though I'm trying to reform)?
Re: Simple 6502 Test System with ROM Emulator
Posted: Mon Oct 12, 2015 1:44 pm
by BigEd
With verilog there's the possibility of printing out readable diagnostics - it's like hardware with printf. So it can be just a little bit higher-level than using a logic analyser.
Re: Simple 6502 Test System with ROM Emulator
Posted: Mon Oct 12, 2015 2:19 pm
by jmp(FFFA)
With verilog there's the possibility of printing out readable diagnostics - it's like hardware with printf. So it can be just a little bit higher-level than using a logic analyser.
Sure, if you have put together a nice Verilog (or VHDL) testbench for your system. It would be great to have a testbench that disassembled opcodes on the fly and displayed them along with the machine state (address lines, data lines, register contents, etc.). Still primarily useful if you're working with an FPGA which I'm not at the moment. Some of the better ML monitors that were developed for the old Apple/Atari/Commodore computers would be awesome to use as well, assuming you've got your system far enough along to be capable of communicating over a UART. Haven't run across source code for any of them yet, though I'm always keeping my eyes open.
Re: Simple 6502 Test System with ROM Emulator
Posted: Tue Oct 13, 2015 5:24 am
by barrym95838
[ ... ] Some of the better ML monitors that were developed for the old Apple/Atari/Commodore computers would be awesome to use as well [ ... ] Haven't run across source code for any of them yet, though I'm always keeping my eyes open.
Excerpt (not stand-alone, obviously) from
ftp://ftp.apple.asimov.net/pub/apple_II ... 20Info.pdf:
Code: Select all
[ ... ]
FA43: 20 D0 F8 372 STEP JSR INSTDSP ;DISASSEMBLE ONE INST
FA46: 68 373 PLA ; AT (PCL,H)
FA47: 85 2C 374 STA RTNL ;ADJUST TO USER
FA49: 68 375 PLA ; STACK. SAVE
FA4A: 85 2D 376 STA RTNH ; RTN ADR.
FA4C: A2 08 377 LDX #$08
FA4E: BD 10 FB 378 XQINIT LDA INITBL-1,X ;INIT XEQ AREA
FA51: 95 3C 379 STA XQT,X
FA53: CA 380 DEX
FA54: D0 F8 381 BNE XQINIT
FA56: A1 3A 382 LDA (PCL,X) ;USER OPCODE BYTE
FA58: F0 42 383 BEQ XBRK ;SPECIAL IF BREAK
FA5A: A4 2F 384 LDY LENGTH ;LEN FROM DISASSEMBLY
FA5C: C9 20 385 CMP #$20
FA5E: F0 59 386 BEQ XJSR ;HANDLE JSR, RTS, JMP,
FA60: C9 60 387 CMP #$60 ; JMP (), RTI SPECIAL
FA62: F0 45 388 BEQ XRTS
FA64: C9 4C 389 CMP #$4C
FA66: F0 5C 390 BEQ XJMP
FA68: C9 6C 391 CMP #$6C
FA6A: F0 59 392 BEQ XJMPAT
FA6C: C9 40 393 CMP #$40
FA6E: F0 35 394 BEQ XRTI
FA70: 29 1F 395 AND #$1F
FA72: 49 14 396 EOR #$14
FA74: C9 04 397 CMP #$04 ;COPY USER INST TO XEQ AREA
FA76: F0 02 398 BEQ XQ2 ; WITH TRAILING NOPS
FA78: B1 3A 399 XQ1 LDA (PCL),Y ;CHANGE REL BRANCH
FA7A: 99 3C 00 400 XQ2 STA XQT,Y ; DISP TO 4 FOR
FA7D: 88 401 DEY ; JMP TO BRANCH OR
FA7E: 10 F8 402 BPL XQ1 ; NBRANCH FROM XEQ.
FA80: 20 3F FF 403 JSR RESTORE ;RESTORE USER REG CONTENTS.
FA83: 4C 3C 00 404 JMP XQT ;XEQ USER OP FROM RAM
[ ... more Woz goodness ... ]
Mike B.
Re: Simple 6502 Test System with ROM Emulator
Posted: Tue Oct 13, 2015 6:53 am
by BigDumbDinosaur
If you have a 65C816 system you could use Supermon 816 to do your software debugging and testing.
Re: Simple 6502 Test System with ROM Emulator
Posted: Tue Oct 13, 2015 2:12 pm
by jmp(FFFA)
Thanks Mike. Nice to see that asimov.net is still up and serving classic Apple II goodies.
Given constraints on my time, I'm afraid I'm going to have to limit myself to running software which doesn't make too many assumptions about the underlying architecture of the computer. I'm sure given the time I could "port" Apple's beautiful monitor to run on my test system, but it took me under 1 hour to port Daryl's monitor to run on it yesterday evening. I only needed to rewrite his ACIA subroutines for the 6850, compile it under 64tass, and convert it into a suitable format for the PIC to load into the SRAM and it came right up. Given my success there, I think I'll try his full monitor+EhBasic combination next, and if that works, get on with the PIC-based UART which was the excuse for creating this little test system in the first place. Once I get the hardware to a happy place, I'll spend some more time playing with software. But after the UART, I want to tackle PIC-SPI, PIC-I2C, PIC-PS2, and PIC-USB next, and then build some sort of simple VGA display interface (no MCU here, I'll use a CPLD or FPGA for this).
Re: Simple 6502 Test System with ROM Emulator
Posted: Wed Oct 14, 2015 2:00 am
by jmp(FFFA)
OK, test system is good to go. It runs Daryl's monitor and EhBasic just fine, so that's more than enough to get started testing a PIC-UART. Coding will begin on that henceforth. I hope to have it emulating a 6850 and 6551 within a week or two. Once its minimally tested, I'll publish the C source on Github and put a link here. I guess I'll start a new thread for it here as well when there's something to report.
Edit: I did take the opportunity to test the system running EhBasic at a clock rate of 7.37 MHz. I knew the system minus the UART could run that fast, but I was a little surprised that the 68B50 worked fine with the E, TX, and RX clocks all set to that rate as well (divided by 16 gave an I/O rate of 460.8 kBaud). Not bad for such an ancient part which is rated at only 1.5 Mhz.