Yeah, I'm finding their data is pretty sketchy. Their ap. note at
http://www.hantronix.com/down/t6963app.pdf , although it's for a 240x128 graphics module, does however specifically say it has 8K of display RAM, and they show a program for feeding it with an 8051 running 1.3MIPS.
Perhaps this is true for their 240x128 displays; however, their 320x240 displays (which is what I thought we were talking about all this time) require a dedicated
external controller chip. Please see
http://www.hantronix.com/down/3224app.pdf .
The info on the 320x240 I mentioned earlier specifically said its duty cycle was 1/240, which confirms to me that they do an entire row at once and every one of the 320 dots in that row have to be fed at the same time by the column drivers.
Yes, that is my thinking as well. But I don't see them including a full 10KB of RAM on the LCD module. According to their timing diagrams, you assert the FLM signal to start a new frame, then you clock in parallel data (yes, in a weird hybrid row/column format, as Tancor previously described) with CL1, and CL2 is used to "serialize the data to the display" -- e.g., FLM is analogous to a vertical sync, CL2 is analogous to a horizontal sync, and CL1 is analogous to a dot-clock.
Even multi-line displays are often addressed as if they were one longer line of up to 11 rows of dots, with more dot columns than you might expect. OTOH, the 1-line, 16-character LCD on my workbench computer uses 1/16 duty, and acts like two lines of 8 characters each but they're stuck end-to-end instead of one on top of the other. The two lines each being eight dots high is where the 1/16 duty comes in. (It's 16 rows of dots.)
The memory requirements for a 16x1 or even a 40x2 character matrix display isn't anything like a 320x240 display, especially one that is color. Also, the pixel change time seems to be so slow that a direct drive from a microcontroller is quite economical.
I don't know. I'm not saying it's impossible; perhaps they physically include one flip-flop per pixel, placed right where the pixel is located (made with transparent semiconductor material; I remember reading about this technology back when super-twist displays first made their debut in laptops in Radio-Electronics magazine). But I do not recall seeing mention of this in their datasheets, and therefore assume that it doesn't have it.
At any rate, I don't think we should continue along these lines. Continual refresh versus transparent storage appears to change on a module-by-module basis, and also with time (e.g., I wouldn't be surprised if the 128x64 LCDs of 5 years ago were continual refresh, while today they're not). I'm just glad their prices are coming down.
$25 for a 320x240 display isn't bad. You can do a lot with a 320x240 display, even if it is monochrome. Still, monochrome, non-interlaced NTSC isn't hard to produce -- it's only when you introduce color that it becomes a nightmare. 8bit mentioned a chip that could assist in the production of color NTSC. I envision PAL as basically the same as NTSC electrically speaking, with only minor timing changes and a different number of total lines displayed.
Still, driving a VGA monitor is almost as easy as driving a continual refresh LCD panel -- all the signals are basically the same. The difference is the addition of the RGB DAC, which can be built using discrete components fairly inexpensively and easily.
Unfortunately, I didn't get a substantial level of interest for my proposal to justify the expense of a programmable chip development environment, the R&D costs associated with each project, and documentation costs. A total of 3 units from Tancor and a
possible 50 units from candle, priced hypothetically at US$30 each, would not even come close to making up for the development costs. It wouldn't even pay for the chip programmer. And I got no response back whatsoever on other kinds of support chips; therefore, no other ways to amortize the investment I would have made.
