reading the board, wikipedia and GARTHWILSON's detailed works, especially here:
http://wilsonminesco.com/6502primer/IO_ICs.html
the existing datasheets and other sources I have more questions than answers.
we are primarily interested in current production chips

all of these chips in CMOS versions are at least:
Static to 14MHz and Bus compatible with 14 MHz W65C02S and W65C816S
Static to means it can stop and hold its state and be stable 'up to 14MHz',
and it is able to share a bus with 65xx cpus okay.
come in a 40 Pin Plastic Dip and can run on a 5V Power Supply
It can fit on a breadboard and use 5v rails.


______________________________________________________________________________________________
6521 PIA
https://www.westerndesigncenter.com/wdc/w65c21-chip.php
https://www.wdc65xx.com/wdc/documentation/w65c21s.pdf
https://en.wikipedia.org/wiki/WDC_65C21

Features:
2 x 8−bit bidirectional I/O ports with individual data direction control
Automatic "Handshake" control of data transfers
2 Interrupt outputs with program control

so there seems to be very little use of this or projects employing it. I read "two 8-bit parallel ports". This lends me to think of this as an 8 or 16 bit mono- or bi-directional parallel port, and in my head, that says 'printer port' though I know this is not the same thing as an IEEE 1284 port/cable/whatsit. (20 years since I needed to know that.) There is a shortage of usage of this circuit which seems to require a lot of extra support hardware, like timers?

so, the PIA also looks to be the oldest of the chips in this set, and mostly not so great, it seems like the VIA chip, it's successor is better in everyway, except the 6522 has a bug in it. In fact, although his chip has no timers or other features, it also is seems to be "bug free".

This chip will at least need timer circuitry and maybe latches to start doing what other chips can do. Is there any practical reason to employ the PIA '21?


______________________________________________________________________________________________
6522 VIA
https://www.westerndesigncenter.com/wdc/w65c22-chip.php
https://www.westerndesigncenter.com/wdc ... 65c51n.pdf
https://en.wikipedia.org/wiki/WDC_65C22

this seems a little newer and has the same features as the 6521, except it also has timers,
some handshake/syncing functions, is explicitly 8 and 16 bit, has Latches on its I/O, can work
with TTL circuits, and it can run on variable voltages.
2 x 8−bit, bi−directional peripheral I/O Ports
2 x 16−bit programmable Interval Timer/Counters
Synchronous Serial bi−directional peripheral I/O Port
Enhanced "Handshake" feature works with either 8− or 8/16−bit systems
Latched Input/Output Registers on both I/O Ports
Programmable Data Direction Registers
TTL compatible I/O peripheral lines
1.8V(W65C22S only) − 5V Power Supply

Quite impressive indeed, except that...
it has a bug in two of its serial modes, see here: http://forum.6502.org/viewtopic.php?p=2310#p2310
Now from what I am reading, this can be resolved with a tiny flip-flop and running to the clock pin on the cpu...
the datasheet says for the cmos version, you need resistors, so, you will need as much or more support hardware here, as with the '21 PIA. However, this seems to be a 'workhorse chip' on many designs and possibly worth the extra effort, it truly is a versatile chip.
However, we still have not explored the 6551 chip, the more advanced comms chip in the family.


Comparison of 6521 and 6522 chips:


______________________________________________________________________________________________
6551 ACIA
https://en.wikipedia.org/wiki/WDC_65C51
https://www.westerndesigncenter.com/wdc ... n-chip.php
https://www.westerndesigncenter.com/wdc ... 65c51n.pdf

these seem to be the most powerful of the chips available, until you take a closer look and realize it does not have parallel transmit line per se, it has modem control functions and is basically serial only.

Full duplex operation with buffered receiver and transmitter
Data set/modem control functions
Internal baud rate generator with 15 programmable baud rates (50 to 19,200)
Program−selectable internally or externally controlled receiver rate
Programmable word lengths, number of stop bits and parity bit generation and detection
Programmable interrupt control
Program reset
Program−selectable serial echo mode
2 Chip Selects

So this chip is not more or less powerful than the other two, it actually does different things. It is basically a very low level modem/modem controller and seems really very gear towards the RS-xxx series of protocols, and could be used for several others.
I am uncertain what this chip can really do alone, though coupled with a 6522, it seems very versatile at sending and receiving data.

It appears this chip as well has some hardware errors and may need workarounds or a recall.

https://github.com/andrew-jacobs/w65c81 ... 6sxb.inc-1

______________________________________________________________________________________________

Beyond this are many other options for CPU I.O that are not in the 65xx family of ICs.
We will explore these and the primary protocols in use todays and start identifying possible choices in our next post.

Any errata , corrections or other info in replies will be consolidated here or below.

Reserved for UART and MCU choices...

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

the 6522 doesn't have hardware SPI or I2C as the datsheet never mentions that.
but anything can become an SPI/I2C controller if it has programmable IO pins, which the 6522 has. so you just have to implement the interfaces in software.
the advantage is that you safe yourself the need for dedicated hardware taking up space on a PCB and making the design more complicated.
the obvious disadvantage is the speed, but i honestly can't really think of any SPI/I2C devices that would benefit from a high bandwidth anyways (except for a Co-Processor or something Graphics related).


i found that to be pretty true. i still reget not including one in my very first 65C02 SBC.

and honestly for what you have planned i'd almost recommend having 2 VIAs (if you don't want to use the PIC as a SPI/I2C/UART controller).
one VIA would be for SPI/I2C and other onboard signals you might have, and the other would be solely for User IO, so people get 16 GPIO Pins to connect and experiment with anything they want.

sorry i didn't answer everything from your post... but that was the part i thought i could comment on the best

As for the 65C22, I don't find it to be a "must have" chip for any 65xx system.

The last system I designed using a 65C22 was about 10 years ago. The 16-bit timers can be useful, but it all depends on how you intend to use them. As they are strictly tied to the CPU clock, the faster the CPU speed, the less useful they can become, depending on the usage. As for the dual 8-bit I/O ports, that again, depends on what you intend to use them for. Typical uses include a matrix keyboard, parallel printer port, LCD display, SPI/SD-Card interface, etc.

I dropped the W65C51 years ago after I discovered the xmit status bit being stuck. Bottom line, I can't ever see this being fixed. I went to the NXP DUARTS (BDD's insistence paid off) which are significantly better, faster and more flexible. Having a 16-bit timer that syncs to the baud clock input makes this an easy jiffy clock regardless of the CPU clock speed. There's some I/O as well, but not as many or as flexible as the 6522.

My current 65C02 system doesn't have any 6522 VIAs... yet it has dual serial ports (one for console and one for additional communications), some input and output pins which are free to use, a 10ms jiffy clock for RTC, delay and benchmark timings. All of that is handled by one chip (28L92). There's also a Maxim realtime clock and a 16-bit IDE interface for storage. If needed, I can always add additional I/O, which could include VIAs or other devices.

I think it's a good idea to put some additional thought into what you intend to use your 8-bit creation for, before deciding what has to be part of it.

_________________
Regards, KM
https://github.com/floobydust

I am aiming to use the PIC or other controller for most I/O, most of the time. I think one should be okay for day to day operations, along with a 'duart' unit or similar for asynchronous support. Only in recovery mode will the system be directly running off of the cpu, and having a duart and 6522 on the board at all, is somewhat redundant, if the PIC24 and gpu and spu all function right.
However, for debugging, flashing ROMs and such, not using the PIC, to just turn it off, suspend it etc, and look around its registers, update the screen directly and look around the gpu or reload its drivers etc, configure peripherals over cables and ports, then having some other way of communicating is desirable. Much less for things do not need a dedicated MCU for their design, and this is as much for others as it is for me.


I am very much interested in alternatives to the WDC 65xx chips. What alternatives for the 6521/22 do you propose?


What is driving/controlling those DUARTs?
"How?"

aren't these gone now?


absolutely, that is why I made this thread, to go over options, identify nuances and share alternatives and workarounds. I found almost noting on the PIA when I searched, and I am still reading the thread on DUART alternates. This thread is not just for my projects, its more information about these chips and alternatives for everyone.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

First, I'm not suggesting there are ANY chips that replace WDC chips such as the 65C22 and 65C21. If you need the functions they provide, just use them. I'm simply stating that the 6522 (all versions) is not a "must have" chip for a 65xx based system. You need to figure out what type of I/O you want or need to have for your specific project. Do you have a basic set of requirements for your first system?

The DUART, it's just a 2-channel serial controller. The BIOS for my C02 Pocket supports both channels with interrupt-driven receive and transmit. The C02 Monitor code uses the first channel as a text based console. A FTDI USB to serial adapter connects to one channel of the 28L92 which connects to a standard PC USB port and you use a standard terminal program to interface to the system.

NXP has announced end-of-life (EOL) for their SC28L92 DUART, but Texas Instruments has their TL29L92 part, identical function but the only package available is a 44-pin QFP.

You can take a look at my Github page and get all of the details for the C02 Pocket SBC and the RTC/CF Card adapter... schematics, PCB layouts, full software, etc. Sometimes it helps to see what some other folks have already done. But again, you need to have an idea as to what you want to do with your system... that will define what I/O devices you need and you can then move forward with an initial design as a starting point.

_________________
Regards, KM
https://github.com/floobydust

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

So to be clear, when i have said "all you need is a 6522" to do SPI, and people are saying "you need to bit bang (program) the IC" and my response is "you have to do that to all of them, right?"

what I mean is, you do not need an extra timer, or a bunch of inverters for each data line, or any other support hardware.
and given statements about the FTDI USB to serial adapter, NXP DUART, and Ti equivalents, these too need programmed the same way a 6522 needs programmed, you have to give the CPU instructions to control and communicate with that chip.

Im going to go out on a limb and say it would be very inefficient, you could probably get a CPU to a lot of this stuff with logic chips and shift registers and latches, possibly even some simple things without them if the cpu was clocked right. I am not suggesting to do so, only that it could.
The purpose of these specialty chips is to simply and offload repetitive tasks so the cpu can centrally process as a unit.

regarding these DUART units, they are operating the same way the bench LCD Im getting does, in parallel communication mode, on the x86/8080 protocol, or the 6800 parallel protocol, rather than SPI, I2C etc. So in this, one would address the devices and send them data as you would anything else, and it seems that much on 65xx ASM, is basically all "MMIO" from what I have read so far.

I am going to review and compare several of these UARTS that can use a parallel communication mode, and I think you might be able to pull off some kind of SPI or 1-2 wire something or another very, very inefficiently directly from the 65xx, certainly with a few 'glue chips'.

any suggestions or requests for ICs of protocols to discuss or explore here?
any corrections or guidance on my understanding of parallel mode addressing/communication for these duarts that are popular?

Let's try this a different way.... from your response, it's apparent you don't understand much of the terminology that's being used, and/or what many of these I/O devices actually do or how they work.

Take SPI... it's a serial protocol to access a device. Serial, meaning it sends data via a single line, hence you need to send multiple bits, or voltage transitions, of the data line with specific timings that adhere to the defined protocol. A 6522 has timers and parallel ports, but it's knows nothing about SPI. The term bit-banging implies that you, as the programmer, need to implement the SPI protocol by taking a single port line for data and via software, program the line transitions to respond at the proper timings. Granted, there's more than the single line, but that is defined in the hardware interface and the software protocol for SPI. You have to implement this with hardware to connect 6522 port lines to an SPI device and write software to make it all work by implementing the protocol in software.

A UART on the other hand, natively supports the serial protocol based on asynchronous standards that have been around for decades. The transmit and receive lines, and the handshake lines are handled by the UART without any specific programming other than the configuration of the data size, parity, stop bits, etc., which are all part of the RS-232 (or TIA-232) standard. Once the serial port is configured, you can send data to the UART and the UART will handle the sending of it per the standard protocol. The same will happen with receive... the UART will receive the serial data and simply make it available as a single data transfer to the processor.

In both cases of interfacing the 6522 VIA or SC28L92 (Dual UART) to the 6502/65816, that is an 8-bit parallel interface with multiple registers accessed via address lines along with a chip select, read and write lines, or CLK and R/W for 65xx peripheral devices. Note that you can also define specific hardware functions such as parallel or serial ports using 74xx logic devices, things like latches, gates, inverters, shift registers, etc. I would suggest you spend some time reading the datasheets and trying to understand how each of the I/O devices you intend to use actually operate... both at the interface to the host processor and interface lines to the external world, e.g., 6522 port lines or UART data/control lines.

_________________
Regards, KM
https://github.com/floobydust

Im not sure why you are getting that impression.

Right there with you, GARTHWILSON has some SPI.ASM code that goes over a basic 'driver' for the 6522 that does this. So far so good.

again, I think all I am saying different here is you still need to tell the UART or CPU what to do, or how to handle that data. Some of what I am looking at, especially from GARTHWILSON, is that the 6522 is also used as intermediary between some ICs and the 65xx.

Right, I think we are saying the same thing then, good deal

I think that's because when the IC's aren't conveniently able to be put directly on the bus (because of speed, pinout, etc.), or connected via a protocol that a bus-capable chip (UART, SPI, etc.) can communicate with, the 6522 can be used as an intermediary.