Haven't had much energy for editing these days unfortunately, I still want to complete the current project, but I'm not so sure about keeping up with making videos. I have this self imposed requirement to not do anything with these breadboards unless it is on video, to prevent continuity problems, but it has been a bit frustrating.
So, at the moment, I'm having some fun working with CPLDs and building new ideas there. Naturally, I'm thinking about a new computer based on what I learned from the current project.
Here are the highlights of what I'm thinking about:
- 14MHz 65C816, PLCC or SMD ICs, only new and available parts
- Single cable operation from my computer (power supply, interacting through serial console, programming the CPLD, programming the EEPROM, accessing any device on the bus)
- 65C816 CPU
- 1M of RAM, 512k of ROM (copied to RAM at boot)
- FTDI FT4232H to provide 2 USB-to-UART interfaces, 1 USB-to-SPI interface and 1 USB-to-JTAG interface
- ATF1508 glue logic, programmed through FTDI chip (no external programmer needed)
- Dual-channel UART based on the 16C550C (eg 16C552). One channel for the main program, one channel for machine language monitor. Fast, FIFOs and Auto Hardware Flow Control
- MC23S17 SPI-to-GPIO to provide full control of the bus and control signals through USB, including single stepping the clock, breakpoints and tracing execution, programming the EEPROM and reading/writing I/O devices
- For I/O, a VIA and an RTC, keeping it simple
- And finally, an expansion bus based on PCIe x16 connectors, with 5V/3V3 selectable logic levels to be compatible with FPGAs (future video/sound project). All signals and busses exposed.
Here is a diagram
Code:
D0-7 A0-23 CTRL
┃ ┃ ┃
┌───────────────┐ ┃ ┃ ┃ ┌───────────────┐
│ MCP23S17 │◀─────▶┃ ┃ ┃ │ 512k ROM │
┌─────────────────▶│ │◀──────╋────▶┃ ┃ │ │
│ │ SPI-to-GPIO │◀──────╋─────╋────▶┃ │mirrored to RAM│
│ └───────────────┘ ┃ ┃ ┃ └───────────────┘
│ ┃ ┃ ┃
┌────SPI────────┘ ┃ ┃ ┃
│ ┌───────────────┐ ┃ ┃ ┃ ┌───────────────┐
│ │ │◀──────╋─────╋────▶┃ │ │
│ ┌───────────▶│ ATF1508 CPLD │ ┃ ┃ ┃ │ 1M SRAM │
│ │ │ │◀──────╋────▶┃ ┃ │ │
│ ┌──────JTAG──┘ └───────────────┘ ┃ ┃ ┃ └───────────────┘
│ │ ┃ ┃ ┃
│ │ ┃ ┃ ┃
┌───────────────┐ ┌───────────────┐ ┌───────────────┐ ┃ ┃ ┃ ┌───────────────┐
│ │ │ │◀─────UART Program───▶│ 2ch UARTT │ ┃ ┃ ┃◀─────▶│ │
│USB (Computer) │─────▶│ FT4232H 4ch │ │ │ ┃ ◀─────╋──────▶│ 65C816 CPU │
│ │ │ │◀─────UART Monitor───▶│ TL16C552 │ ┃◀────╋─────╋──────▶│ │
└───────────────┘ └───────────────┘ └───────────────┘ ┃ ┃ ┃ └───────────────┘
┃ ┃ ┃
┃ ┃ ┃
┌───────────────┐ ┃ ┃ ┃ ┌───────────────┐
│ │ ┃ ┃ ┃ │ │
│ 65C22 VIA │ ┃ ┃ ┃ │ RTC │
│ │ ┃ ┃ ┃ │ │
└───────────────┘ ┃ ┃ ┃ └───────────────┘
▼ ▼ ▼
┌────────────────────────────┐
│ To Expansion Bus... │
│ │
│ PCIe x16 Connector │
│ Selectable 5V/3V3 │
│ (74LVC16T245) │
└────────────────────────────┘
It's still quite a bit early in the design phase, but I've started on some of the building blocks of the hardware. My passion lies with building circuits so writing a complete OS for all of this might not happen. Still, I think it is a pretty neat design, especially the focus on single cable integration with the computer for iterating on code and logic.
Feedback welcome!
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