My point is that the spec's are just data points and any design is just
an extrapolation from those data points.

The way things are generally spec'd you don't really have enough
information to characterize a particular design precisely.

Personally I think of MOS Technologies as being (having been)
notorious for their lousy specs.

In the case of WDC they don't specify capacitance (at least that I see),
although maybe that's implicit from some more general specs pertaining
to CMOS.


If I were going to relate it to this thread I'd say it makes a lot more
sense to extrapolate a few ns of data due to bus capacitance than to
hope that there are no spurious reads (which seem implicit in BDD's
ideas) or that spurious reads would cause no problems.

In the simulator's options, be sure to disable the I/O area. Otherwise, the range $E000-$E006 will be used to control the terminal window I/O. STAs to that area will not write to RAM.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

I should have noted in my previous message that the $E000 location for the terminal window is the default but can be changed in the simulator's options or by using a pseudo-op in your source code.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

I got it working reliably up to 10MHz running the "OS" from 10ns SRAM and using all ABT TTL (except 1 AC138 which has a max prop delay of ~10ns). Using wirewrap is probably one of the main speed limiting factors.

Now it's time to replace all the discrete logic and use a 7ns ATF22V10C. Going to try using Atmel's free WinCupl & WinSim.

Once I get the SPLD progammed correct, it'll be time to make boards

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

Here's the final schematic:

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

10 MHz with a mess 'o wires is pretty good. Sounds like you're on your way.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

Just thought I'd share this. It's a 50/50 duty cycle variable frequency generator. Only available in "S" series TTL. It can go up to 60MHz, sort of a current hog, but I used it and even though there is a little bit of jitter looking at the waveform on the scope, it is reliable for phase 2 in on the W65C02, even up to 10 MHz. The jitter did not seem to interfere with code execution. Also, it has sep, analog and digital grounds. I made the table from my measurements.

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

Ain't gonna work...

For some reason, apparently the Atmel 22V10C part has a different programming algorithm than a GAL22V10. Daryl has had the same problem trying to program the Atmel part. Since the G540 programmer I used to program the Atmel EEPROM is not officially endorsed by Atmel to program their PLD's and since the G540's manufacturer recommended using the original GAL22V10's (thanks to both for responding to emails very quickly), I started looking up "qualified" programmers. Cheapest I found was about $350...

In the end, to make a long story short, I happened across the "hack-a-day" sight (I know someone else in here linked to the site before, they are top notch). I Googled a beginner tutorial on CPLD's and they do have a very well written up little blurb for beginners. I chose a Xylinx kit for $50.

http://hackaday.com/2008/12/11/how-to-p ... ices-cpld/

But, I can already see I'm going to have to modify it and remove the surface mount XC95xx chip and put a 44pin PLCC socket in there with a higher speed version. As hackaday pointed out PLCC and/or 5v devices seem to be a dying breed. I was able to pick up a few 10ns versions.

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

The Lattice brand GAL's program fine in my programmer.

Mouser has 10ns, 24 pin GAL22V10D PDIP's for $5.50

Part # is 842-GAL22V10D10LPN

Daryl

I know I should've started out learning PLD's from the simplest IC's, that was my intent. But I'm going to try my hand at learning Verilog with the software that is coming with the XC9572 eval kit. Even these kits have been discontinued by Digilent, only old stock is selling. How far behind am I!... Looking forward to learning Verilog, and the other tools, and work up to the Spartan 3 series FPGA... After doing some research, Xylinx becomes the obvious choice, just because of their support software.

I also found out by posing a few questions on New Haven Display's forums, that the max frequency for the E (phase 2) signal on my 320x240 TFT display is 10MHz, which explains my top 65C02 speed. So I'd bet money my CPU section can go above this if I had a display that could handle the faster speeds. Their 640x480 8-bit display can go up to 55MHz. Even though it uses a different controller IC, data seems to be written in the same manner, so my software will be compatible. When I get some spare $, this display will be my next purchase. I really want to see if 14MHz is a conservative rating for WDC's 65C02. 20MHz would be very nice.

So my plan is, when I get the new 55MHz 640x480 display, to use it in my current wirewrap design with the latest schematic posted on this thread (I WILL be replacing the 'AC138 with an 'ABT20 dual 4 input NAND gate, 1 gate will address the EEPROM & SRAM and the other gate will address the display, I just need to find a PDIP version)... The old display I'll be using, since I know EXACTLY how it works, with a new wirewrap board using the XC9572 for memory decoding, since speed will not be the issue (successfully programming the CPLD will be the issue), I'll run it at 6MHz, and continue to update that project on the Fuel Injector Pulse Width Analyzer thread.

Any books you guys recommend for learning Verilog? I've got a few in mind already...

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

This is the package I received today.... BS! 4 day delivery period. I paid for 2nd day air! UPS is garbage. The package was abused, then taped over. **** on those bastards.
Some may consider this off topic, but it is so VERY on topic IMO. Edit as you will.

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

UPS is very expensive and not as fast as other services. When I had to ship a bike frame a couple of years ago, I found FedEx was half the price and twice as fast. Usually I use the post office which is also cheaper and faster than UPS. Many companies don't like to use it because it doesn't offer the tracking that UPS does, but in 17 years of our company shipping through the post office, they have never lost or damaged anything for us.

My experience with UPS has been nothing but stellar. Boxes shipped with clean, crisp corners with only the occasional crease in the cardboard. Always on time.

The package you received through UPS is exactly what I receive all the effin' time from USPS.

My experience with FedEx is similar to UPS.

Anyway, it sounds like UPS had accidentally dropped the box in the back of their truck or in the cargo hold of their aircraft. In any event, I would haul that box down to your local UPS depot and complain vociferously about it. If UPS doesn't know there's a problem, they can't fix it.

Was the package actually delivered by UPS, or are you in an area where they contract out the delivery to the USPS (for profitability reasons)?

Some time ago I read a write up of what happens inside a courier's automated hub facility - boxes are moving at outrageous speeds, and when they hit a support pillar or something, with more boxes piling up behind them, that's the kind of damage they get.

Can't find the write-up now.