Looking for potential schematic corrections

[Kuzailongmane]

Hi all,
I'd really appreciate it if you could take a second and look at these schematics for any goofs I've made and did not catch

Tinderbox_SCH.PDF

(25.84 KiB) Downloaded 70 times

Thank you!

[sburrow]

Am I missing something? I see sheet 5/5 but nothing before it. Maybe it's just me?

Chad

[Kuzailongmane]

sburrow wrote:

Am I missing something? I see sheet 5/5 but nothing before it. Maybe it's just me?

Chad

oops wrong file!
heres the right one:

[sburrow]

So some small things that I notice:

1) Sheet 2/5 is way overly complicated with the wires going all over the place. Notice particularly particularly the databus from the '816 to '14 and '245. Wow! I would much rather see labels or a thick bus line or something. Also the top side of the '816 has wires going everywhere, I can't tell what is what.

2) So, I was just looking at something like the BE line on the '816 and it goes through a 4.7K resistor, then goes... out somewhere? I eventually found that it led to VCC, which is good, but if you were to just put some VCC labels nearby, that would be much easier than running a line all around just to lead to VCC or GND or something so common.

3) I don't see a "hey this is what I'm thinking this will do". A summary would be nice, maybe I missed that on a different topic perhaps. Some kind of theory of operation and/or memory map would help.

4) I see you are using a 6551, which is fine, but I particularly cannot help on that at all. I know others here know much more about it's operation. On that same page, you are using some diodes in series with the B-databus, is that some diode logic? If so, seeing all the other chips you are using, why not just use chips for that too? They seem to lead to a '138.

5) I see some 74LS chips in there, some 74HCT chips, some 74AC, and one 74HC chip in there. Was that intentional? Because those... don't easily mix.

That's the best I can offer. I am by far not an expert at all, perhaps my asking questions or being confused is good enough to get something moving though.

Chad

[floobydust]

Well, for starters, I would suggest you start with an overview of what you're attempting to build. Start with a description of the hardware, i.e., CPU, memory, I/O devices, describe the memory map and I/O decode, etc. Also, describe parts of the actual schematic pages, what they are, etc.

Some examples. Page 5 shows 8-connectors (perhaps) labeled as jumper 2. Are these expansion ports?? If so, label them as such. If they are expansion ports, there's not ground or power, but perhaps the other 2-pin jumpers are part of the expansion ports?? Also, Page 4 seems quite barren... just a power connector with 3 different voltages? Page 3, what is J2? As an outsider, it's not that clear what you're attempting to build here.

Looking at Page 2, the diode marked as D2 is backwards, meaning it won't conduct and give you an actual reset signal. Also, 10MHz might be a bit hopeful, as there's no specifics on the memory devices, however, the standard and available AT28C256 EEPROM is a 150ns access memory chip, so 10MHz is not realistic.

It's also a very heavy chip count... is this a first blush at coming up with a design? Designing a system with the 65C816 is a bit more involved than the 65C02. I would recommend you look at some existing designs that use the 65C816... BDD's POC series at a minimum.... not to mention that WDC offer a SXB that uses the 65C816. If you've not designed and built any other similar systems before, I would suggest a simpler system at first. Also note that the current W65C51 ACIA has a defect concerning the status register transmit bit, so any existing code that uses it (which is pretty much every piece of code ever written for the 6551) won't work.

Another gotcha... your RAM select is using A15 and inverting it as a chip select. That will select memory starting at $8000. Perhaps you want it to be selected at $0000. If that's the case, just use A15 as the chip select (eliminate U15b). As it is, it will be selected when your ROM select is active, hence a contention on the bus.

[Kuzailongmane]

Alright., here's what i have so far:

Tinderbox_SCH.PDF

(257.02 KiB) Downloaded 61 times

[BigDumbDinosaur]

Kuzailongmane wrote:

Alright., here's what i have so far:

The attachment Tinderbox_SCH.PDF is no longer available

I'd like to help, but I can't read schematics with color in them.

Meanwhile, here's something for you to look at as a working reference design.

pocv130.pdf

POC V1.3 Schematic

(344.54 KiB) Downloaded 62 times

The above unit has 128KB of RAM, 12KB of ROM, four serial ports and is built entirely with 74AC and 74ACT discrete logic. It runs at 16 MHz.

[Kuzailongmane]

Hey all,

updated the schematics and cleaned them up a bit,
still looking for feed back and ideas.

thanks!

[Alarm Siren]

(You'll want to post a greyscale version of the schematic, or a grumpy BDD will tell you off.)

Feedback:

1. Can I suggest bus lines for your address and data busses, to make the schematic easier to read.
2. You could use a DS1818 (or something like it) as a single component replacement for your 555-timer monostable reset controller.
3. I note you're using the 74AC logic family. Generally on this forum we recommend the 74AHC family instead: it has the same fast propagation times, but has gently edges which are less prone to signal integrity problems.
4. The E pin on the '816 is an output and doesn't need a pull-up.
5. Some of your memory/rom decoding looks... strange. Do you have an intended memory map we can check against, please?
6. ABORT and RDY on the '816 should have pull-up resistors on them if you're not using them.
7. Re part U25a, and the note next to it; whilst there's certainly no theoretical problem with using a ROM to decode addresses, I worry that said ROM may not be fast enough - they usually aren't - especially given your 5MHz clock speed.
8. X6, the ACIA: there is a nasty bug in the current production run of the WDC ACIAs that make them hard to use for transmitting without tying up your application in a busy-loop. Not impossible to work around, but worth knowing, especially as there are plenty of other UARTs available that are bug free and more capable anyway. Also I believe the current production run of ACIAs require a 1M resistor across XTAL1 and XTAL2 pins. Both the bug and 1M are mentioned in the Errata at the end of the latest version of the ACIA datasheet.

(apologies if any of the above is stuff that's already been covered - this is the first time I've laid eyes on any version of your design)

[Kuzailongmane]

Alarm Siren wrote:

(You'll want to post a greyscale version of the schematic, or a grumpy BDD will tell you off.)

Feedback:

1. Can I suggest bus lines for your address and data busses, to make the schematic easier to read.
2. You could use a DS1818 (or something like it) as a single component replacement for your 555-timer monostable reset controller.
3. I note you're using the 74AC logic family. Generally on this forum we recommend the 74AHC family instead: it has the same fast propagation times, but has gently edges which are less prone to signal integrity problems.
4. The E pin on the '816 is an output and doesn't need a pull-up.
5. Some of your memory/rom decoding looks... strange. Do you have an intended memory map we can check against, please?
6. ABORT and RDY on the '816 should have pull-up resistors on them if you're not using them.
7. Re part U25a, and the note next to it; whilst there's certainly no theoretical problem with using a ROM to decode addresses, I worry that said ROM may not be fast enough - they usually aren't - especially given your 5MHz clock speed.
8. X6, the ACIA: there is a nasty bug in the current production run of the WDC ACIAs that make them hard to use for transmitting without tying up your application in a busy-loop. Not impossible to work around, but worth knowing, especially as there are plenty of other UARTs available that are bug free and more capable anyway. Also I believe the current production run of ACIAs require a 1M resistor across XTAL1 and XTAL2 pins. Both the bug and 1M are mentioned in the Errata at the end of the latest version of the ACIA datasheet.

(apologies if any of the above is stuff that's already been covered - this is the first time I've laid eyes on any version of your design)

My software is REALLY Buggy and doesn't behave well when using buss lines, the connections either have to be point to point labels or wire if you want a working PCB to be generated.


i will in update the parts to be the appropriate family and change the 4 bit ram to something like a GAL8V16.

I'm kind of stuck on chaining the ACIA as all my monitor Software relies on this chip to function.

My planned memory map is as follows:
$0-$7FFF RAM
$8000-$9FFF I/o
$A000-$BFFF Propeller 2 Vga Interface ( not in schematic Yet)
$C000-$FFFF 16k bootstrap and BIOS ROM PAGE
$10000-$7FFFF Addon prts 0-7
$80000-BBFFFF Rest of flash rom
$BC000-$FFFFF space for addon ram (connector/ decoding logic not shown)



Hope this helps

Kuzai


EDIT: Thanks to whomever linked the tow post i made about my schematics, if someone could please tell me how to this for the future, That would be Awesome!

Thank you all for putting up with my messy schematics.

[Kuzailongmane]

Updates Continue on the Schematic:

Tinderbox_SCH.PDF

(1.27 MiB) Downloaded 47 times

And To make BDD happy:

Tinderbox_SCH_GRAYSCALE.PDF

(1.27 MiB) Downloaded 62 times

Also attached is the INCOMPLETE Flow Chart of The tinderbox's operation:

FLOWCHART.txt

(1.85 KiB) Downloaded 46 times

[BigDumbDinosaur]

I can't make head or tail of the schematic. Sorry.

[Kuzailongmane]

How so?

[Proxy]

oof, there are so many overlapping lines and components, weird bends, text going off the side of the screen, and random X symbols on the connections.

if you say that the software you're using is really buggy, why not use something else? something more functional and readable like KiCad or EAGLE for example?

[Kuzailongmane]

Im using target 3001! As my software bc my pc is a dell dimensions 4600 running windows XP Pro sp3 with a pentium 4 and 256mb of ram. It just wont run anything else and i refuse to draw them by hand.
some of the goofyness is having to do with my export settings, (i think) so ill loook at those.