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PostPosted: Wed Nov 23, 2022 2:52 pm 
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That looks very nice! I don't think I'm making my wires short enough. I don't get that nifty harp effect.

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PostPosted: Wed Nov 23, 2022 3:53 pm 
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Paganini wrote:
That looks very nice! I don't think I'm making my wires short enough. I don't get that nifty harp effect.

The trick is to get them just right. If they curve too much then they act like coils and you get inductance apparently. Too tight and they bow the pins and I guess are in danger of breaking at the corners of the pins.

I've made my board three times so I'm getting quite good at it now. It is time consuming and tedious though. I thought it would be really easy to make changes - you can, but anything more than a couple of wires and it gets really hard! Make sure you wire up long runs in the right order. Pins 1-2 3-4 5-6 and then 2-3 4-5. See Garth's primer.

Would I do wire wrap again? I'm glad I did it. But no, I would spend the time to make a PCB. Wire wrap is expensive too.


Last edited by adrianhudson on Wed Nov 23, 2022 5:46 pm, edited 1 time in total.

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PostPosted: Wed Nov 23, 2022 4:01 pm 
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adrianhudson wrote:
EDIT: I may have found the issue. I made one change in the new build. I replaced the Alliance AS 6C62256 RAM chip with a Samsung KM62256CLP-7L which as far as I can see is pretty much identical in spec. This is the one that has just undergone 48 hrs testing.If I replace it with the Alliance chip, I get errors. I have two other Alliance chips, all the same - 6C62256 - various levels of crash.

I can't determine if it is timing problems or all three Alliance chips are damaged. I will make a ram tester with some breadboard and an Arduino when I get a moment.

Congratulation on getting your board to work!

Interesting observation about Alliance chip AS6C62256 as the possible root cause of your earlier problem which okwatts had also shared similar experience. I had used Alliance's AS6c1008 RAM thinking it is similar technology as AS6C62256 and AS6C1008 did work fine. So I'll order some AS6C62256 and see whether it works in my copy of your board design.

Bill


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PostPosted: Wed Nov 23, 2022 5:12 pm 
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plasmo wrote:
adrianhudson wrote:
EDIT: I may have found the issue. I made one change in the new build. I replaced the Alliance AS 6C62256 RAM chip with a Samsung KM62256CLP-7L which as far as I can see is pretty much identical in spec. This is the one that has just undergone 48 hrs testing.If I replace it with the Alliance chip, I get errors. I have two other Alliance chips, all the same - 6C62256 - various levels of crash.

I can't determine if it is timing problems or all three Alliance chips are damaged. I will make a ram tester with some breadboard and an Arduino when I get a moment.

Congratulation on getting your board to work!

Interesting observation about Alliance chip AS6C62256 as the possible root cause of your earlier problem which okwatts had also shared similar experience. I had used Alliance's AS6c1008 RAM thinking it is similar technology as AS6C62256 and AS6C1008 did work fine. So I'll order some AS6C62256 and see whether it works in my copy of your board design.

Bill

okwatts wrote:
I have been following this thread and am willing to admit that I am a novice at hardware design and theory but I had a working SBC2.7 board from Rich Cini and extra memory chips. This board has been working for 2 years once I got the ACIA issues sorted out. I have 4 32 kb sram chips available in my supply. I have been running this board up at 4 Mhz with an HM62256LP-70 with no issues. I then tried 2 Alliance AS6C62256-55 chips bought new from Digikey and then another chip UT62256-70. My experience is that the Alliance chips are unreliable in that setup compared to the other 2 chips. I replaced the Oscillator with a 1 Mhz one and there was no change in behaviour. The schematic for this board uses the circuit suggest for qualifying the write from Floobydust on Oct 22 and is using 74LS00 and taking the output of PHI2 from pin 39.
This would indicate to me that there is something happening with those chips in this circuit and though Plasmo was able to verify the design he did use another brand of SRAM.
I put this out there for more investigation by others more knowledgeable than me.
PS this is with WDC65c02. I am also relieved that I didn't try this with the Alliance chips first!

Yes. Exactly. Whilst nothing is proven yet, it is looking increasingly like it might be a problem with Alliance. I wonder if they had a bad batch?
To my eternal shame I didn't pay enough attention to okwatts' post :-( Sorry okwatts!
Thanks for doing an Alliance test plasmo


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PostPosted: Wed Nov 23, 2022 5:49 pm 
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Dr Jefyll wrote:
adrianhudson wrote:
I will make a ram tester with some breadboard and an Arduino when I get a moment.
Hmmm... So, will the tester be satisfied with mere TTL logic levels from the RAM? Or will it, like a WDC CPU, require something beyond TTL spec? Seems like a pertinent question, I'd say.

It would be interesting if the tester included a socket for a '245 transceiver on the RAM's data bus. Then you'd have the option to put either an 'HC245 or an 'HCT245 in there, and compare results. (You might find this idea preferable to swapping WDC vs Rockwell CPU's in your SBC... a process with which you understandably may've grown frustrated!)

Alternatively, you could 'scope the RAM's output levels while the test runs (presumably at fairly low frequency). I expect you'd get much cleaner traces than those taken from the SBC.

-- Jeff

Thanks Jeff. All good ideas. I'll get some 245s.


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PostPosted: Thu Nov 24, 2022 3:27 am 
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Glad you got it working. There will be no problems with those Samsung chips. I'd be very surprised if they are not providing at least 4.3V on their outputs.

The HM62256 RAM is a completely different technology than the AS65C62256. The Alliance technology works from 2.7V to 5.5V the Samsung is from 4.5V to 5.5V. That tells us something is very different about the Alliance chip. The actual memory core is likely deigned to run at the 2.7V - 3.3V range with the 5V being regulated down -- seeing as the specs don't change over the voltage range. It is also only rated for 1mA output source where the Samsung is rated at 4mA.

I suspect if your tester is TTL level tolerant, those AS65C62256 chips will test just fine.

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PostPosted: Thu Nov 24, 2022 4:39 pm 
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BillO wrote:
The HM62256 RAM is a completely different technology than the AS65C62256. The Alliance technology works from 2.7V to 5.5V the Samsung is from 4.5V to 5.5V. ...

BIllO
Thanks for that - but I'm using a KM62256CLP-7L (Samsung) not an HM62256.

I'm looking at the datasheets for it and I can't see much if any difference between it and the Alliance - except that this is a 70ns part and the Alliance is 77ns.


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PostPosted: Thu Nov 24, 2022 8:22 pm 
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My bad.

However, the KM62256CLP-7L is still a 4.5V to 5.5V design. That's significant as it's not likely relying on a ~3.3 internal voltage to drive the outputs. It does have a 1mA output current though, so in that respect it's similar to the Alliance chip.

In any case, it's working!

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PostPosted: Sun Nov 27, 2022 4:26 am 
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Hi Adrian,
I received AS6C62256-55PCN from Mouser today. I've also received 74HCT30 from Jameco a few days ago to replace 7430 I used previously. So I believe I now have very similar parts as you do, i.e.
W65C51
W65C02
AS6C62256
AT28C256
74HCT30
74ACT138
74AHC00
2x 1.8432MHz oscillators

Memory diagnostic is loaded in AT28C256 and it works without errors from 5.5V down to 2.2V (the voltage supervisor is disabled). Below 2.2V the test will terminate with "memory test FAILED!" message. Interesting to note at 2.2V the current consumption is about 5mA, rising to 10mA at 2.7V, 15mA at 3.3V, and 44mA at 5.0V.

I let the test run for 10 minutes at 2.2V, 5V, and 5.5V. They all passed.

Bill

PS, it is astonishing that the entire circuit worked down to 2.2V


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PostPosted: Sun Nov 27, 2022 9:05 pm 
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plasmo wrote:

I let the test run for 10 minutes at 2.2V, 5V, and 5.5V. They all passed.

Bill

PS, it is astonishing that the entire circuit worked down to 2.2V

Indeed, astonishing.
Well, I don't know what is up with my memory. I need to make this memory tester.
Thanks so much for all the time and effort you have put in to this.


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PostPosted: Wed Jan 17, 2024 7:37 pm 
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After long time of using 6502 emulators (since the many years since I was coding real apple ][ and atari things) I've been enjoying working thru the ben eater videos and digesting Garth's primer etc. Things were fine with the initial ROM-only test programs but as i've started working with more complex things like LCD driver using RAM for storage and stack I've been seeing similar intermittent crash loops where the code works for an indeterminate amount of time (only 1000s of cycles) and then hits BRK in zero'd memory and starts bouncing back and forth on the reset vector (which is also zero'd). I can see happening "live" if I hook up my lcd stack to the high address byte.

occasionally I am lucky and can see the LCD initialize and write startup text (typically only first run after first powerup), but usually (90%) it crashes earlier, often before completing LCD init sequence. the code is very simple and solid in an emulator. was stuck trying to imagine what could be corrupting the stack and causing the crash and eventually discovered this thread. I am using WDC65c02 also and went back to check my parts shopping basket (sourced my own in Canada rather than standard kit), and lo and behold my SRAM chip is ... AS6C62256-55PCN.

I also had little understanding of the 74hc v 74ls distinction when I was starting out; the quad nand gate on the main breadboard is 74HC, but the mux in the clock circuit is SN74LS157 (ignore the specific part number on the labels which were a great discovery for recalling pinouts). That probably explains why my clock output high is close to 2.5V actually?...

I have a bench power supply so will try first just dialling it downwards from 5.0V and see if that helps. Also will add 10K pullups on data-bus. But sounds very much like the same problem that was much discussed here. You can see my layout is super simple and this is still driven by the v slow 555 clock.

It seems like the ultimate solution here was to replace the SRAM with one from a different manufacturer?


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PostPosted: Wed Jan 17, 2024 8:09 pm 
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Lots of possibilities, but my first question would be about bypass caps - you don't seem to have any on the main board. At least one per chip is a good idea.

Also, more ground wires would probably be a good idea - approximating a grid is a good way to look at it.

But, as your problem is unreliability, and you're on a breadboard, the reliability of connections is another weakness - you need to be sure that every wire and every chip leg is making good contact. If the chips are of an age, then cleaning all four sides of each leg might be worthwhile.


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PostPosted: Wed Jan 17, 2024 8:19 pm 
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they're hard to see on the top view but there's one at top right and bottom left on the power rails. I can sprinkle more around for sure. all the components were new from supplier within 60d. it definitely seems correlated with this thread since I saw no problems with rom-only code; only when I started using RAM for r/w storage (code still all in rom)

can you elaborate on "more ground wires"? when I have each chip grounded to shared rails which are cross-connected, where can/should I add more? I guess I could also cross-connect rails on the bottom edge. i have done a bunch of continuity testing and haven't found anything. these are the "good" breadboards as recommended also :)


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PostPosted: Wed Jan 17, 2024 8:27 pm 
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Good quality breadboard always a good start!

I'd suggest you cross-connect your north-south ground wires two or three times in an east-west direction.

I'd probably also connect at least one more ground between your two main boards: you want a clean clock, and the clock, like everything else, is referenced to ground. So you want a solid ground, in particular the chip driving the clock needs a good (redundant) connection between its ground and the ground of each of the chips receiving the clock.

Of course, I don't know what the actual problem is!


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PostPosted: Wed Jan 17, 2024 8:45 pm 
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The layout is very neat. I'd be surprised if there was a problem with the layout - assuming the contacts on the breadboards are good enough.

Compare with this:

Attachment:
IMG_20231202_212411_DRO.jpg
IMG_20231202_212411_DRO.jpg [ 501.54 KiB | Viewed 2052 times ]


That's a 6507, 8KB RAM chip (only using 4KB), 32KB EEPROM (only using 4KB), a GAL for glue and a latch for output. Also runs at 2Mhz. Those breadboards are the cheapest I could get from a UK retailer.

So if I can get that big mess of wires to run at 2Mhz then your kHz 555 clock should not be the issue. I think i'd be looking at marginal timings on the RAM side of things. Hard to tell though - have you a 'scope?

Other things to try - try cooling the whole thing down if you're in the northern hemisphere just go outside (at least here is Scotland it's 0°C right now!) Often things that might have marginal timings will work when cooler - every hardware engineer I used to work with back in the 90s had a can of freezer spray handy just for that sort of testing... Also the power supply. Do you trust it? do you have a 2nd meter to check? Try taking it up to 5.2v ... My Ruby 816 board really doesn't like anything < 4.9v for some reason (I think the timing for sending commands to the VIA is marginal, but I don't have good enough test equipment to find out - it works at 5V so that's OK for me).

And try resting your hand on it then gently shaking it - see if it crashes - that's as good indication of a loose wire, or bad breadboard track as any.



-Gordon

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See my Ruby 6502 and 65816 SBC projects here: https://projects.drogon.net/ruby/


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