kernelthread wrote:
I had a look at your schematic and didn't see any obvious way to get contention on the data bus (I assume you're talking about the lines labelled D0-D7?).
So it's possible you have a short circult somewhere or the circuit as built doesn't match the schematic in some way.
Is it all data lines which have the contention issue or just one? How long does the 2.5V persist if you examine it with a scope?
Then JLCPCB messed something up. I think it's strange that I have had the same type of signal on two separate boards though. They were of similar design, so that part isn't strange to me.
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I think there is another problem with the circuit though. If the processor performs a write to RAM, the \WE line to RAM is asserted one gate delay after PHI2 goes high. However the BE line is asserted one gate delay after \PHI2 goes low, which in turn will be a propagation delay (from PHI0 to PHI1 on the W65C02) after PHI2 goes high. Thus \WE is asserted before BE. If you look at the data sheet for the RAM chip, it requires the address to be stable before \WE is asserted (setup time given as 0). You probably need to delay the assertion of \WE to maybe the second half of the PHI2 high phase to ensure correct operation.
THAT is good reasoning! Still, I don't think that would cause what I see happening. I would send a picture of the scope, but it's getting late now. On the previous board I had it qualifying the /WE signal to the second half of PHI2 high, but then again my BE logic was messed up on that board and I was getting similar results. *shrug*
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Another slight oddity is that the R/W line from the CPU is actually left floating when BE is low. I'm not sure if that's a problem - capacitance should retain the previous state, but if there is coupling from other signals then maybe it could cause issues.
Yes, I was told that it wouldn't matter, and I purposely make my logic to account for that as well.
To BDD, thank you and yes. I do plan on doing a summary statement here, pictures and stuff. I'm waiting on a few parts first though, I want to try to replace something and see if that helps. I have a couple of ideas, but in the end I am not very hopeful.
On the flip side:
I have altered my existing monitor and BASIC code for my previous board that actually works. And it runs smoothly on that board! I flashed a ROM chip and stuck it in, and it indeed runs well. I figured out a way to have vertical scrolling from write-only video RAM: Duplicate it somewhere else. I have a terribly wasteful subroutine handling it, but it does work at least.
Another thing I find puzzling is that my BASIC is terribly inefficient! My simulator must be running too fast, because I stuck it into my 3.14 MHz board (the one in question here is only 1.57 MHz), and it is SLOW. SLLOOOWWWW. I find that it's slowness is fitting to such a design!
Whelp, there's the update. When I get more parts in and do some tests and pictures, I'll let you know more. Thank you all very much, I appreciate the help and support.
Chad