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PostPosted: Sun Oct 09, 2022 9:49 am 
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Joined: Sat Mar 20, 2010 8:36 pm
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Location: Germany
So I first encountered FORTH in 1983 at the Army Apprentice College, I already knew about BASIC so they had a teacher come in to teach me FORTH as one of the BBC Microcomputers had a FORTH ROM installed. So since then I have had a paper listing of FIG FORTH and wanted now to give it a go. So purchased a board from WDC with the W65C134S microcontroller and 32k RAM and a socket for an external ROM chip ( 128k ). I also got the memSIM2 emulator and a cheap USB logic analyser.

First was to get the board to jump from the internal ROM to the external ROM at $800, much head scratching (and use of the logic analyser) later I acheived the fisrt 'Hello World' ( Assembler ) from the external ROM using the internal Serial routines. Then I ported over what I needed for the FORTH ( mainly serial in and out via RS232/USB ) connection and got this running.

So I had the basics in place and started on the FORTH kernel, converting it to assemble with the WDC tool set, the hardest part was getting it to compile to run in RAM but be stored in ROM. The startup would copy it from ROM to RAM before calling 'COLD'.

Then I got it to run and print 'fig-FORTH 1.0' on the terminal emulator.

A little debugging later I have a running system on the board. It currently has a RAM disk buffer that holds 16 screens, this is initialised from data in the ROM at start up... what joy to see '? EMPTY STACK' instead of '? MSG # 0'.

Next job is to see if I can boot straight into the external ROM after RESET and bypass the internal ROM completly.

Points to note:
1) WDC Data sheets and manuals need a lot of time to understand and they miss a few points out.
2) Board is good for a start up system, would like to add in a second serial port to get a 'disk' added.
3) The board has 16 bytes of zero page missing, and would need considerable external decoding and RAM chip to add this. Why they did not have this on board is another question.


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PostPosted: Sun Oct 09, 2022 11:38 am 
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Joined: Thu Dec 11, 2008 1:28 pm
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Location: England
(Welcome back! Haven't seen you for a while.)


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PostPosted: Sun Oct 09, 2022 2:15 pm 
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Joined: Sat Mar 20, 2010 8:36 pm
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Location: Germany
Thanks for the welcome back, life got in the way ( in a bad way ). So picking myself up and moving forward. Nice to get back to some 6502 work. Just plqanning what to do next...


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PostPosted: Sun Oct 09, 2022 2:22 pm 
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Well done on the successful bringup though. Odd that there should be some missing zero page... perhaps not a problem so long as it's well-documented... which is not a WDC strength.


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PostPosted: Sun Oct 09, 2022 2:52 pm 
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Location: Germany
It has from $00 to $2F for the internal registers ( IO etc ) and $40 to $FF for internal RAM. On the board the external ram is mapped to the CS6 line which is from $0100 to $7FFF. To get to the 'missing' 16 bytes ( $30 to $3F ) you would need to use the CS0 line and gate it with the CS6 line to use on the external RAM ( involving cutting tracks on the board ) or add a second board with a 16 byte memory chip to fill the gap.
Zero page is the most important part of the 6502 memory map so they should have filled it completly.


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PostPosted: Sun Oct 09, 2022 3:57 pm 
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Oh, I see, I/O in zero page - that's a tradeoff.


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PostPosted: Sun Oct 09, 2022 5:21 pm 
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The 65c265 microcontroller is better in that it has a full 512 bytes of ram covering page 0 and 1. IO is mapped at higher addresses ($Dxxx). Maybe my next challange is to get the c265 board and get FIG working in Native mode on it. Then enjoy the fun of getting it working with 16 bit registers.
Or get a 5v CPLD/GAL/FPGA and expand the current board.


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PostPosted: Mon Oct 10, 2022 1:19 am 
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Joined: Mon Jun 24, 2019 1:13 pm
Posts: 34
cheekyfox wrote:
The 65c265 microcontroller is better in that it has a full 512 bytes of ram covering page 0 and 1. IO is mapped at higher addresses ($Dxxx). Maybe my next challange is to get the c265 board and get FIG working in Native mode on it. Then enjoy the fun of getting it working with 16 bit registers.
Or get a 5v CPLD/GAL/FPGA and expand the current board.



I used the M377xx which is a superset of the 65816 in the 90's plus I have an industrial strength Forth that I wrote for it. I do have some 134 and 256 samples floating around though plus I think there was another chip they had too a bit like the 134.


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PostPosted: Sat Oct 15, 2022 3:55 pm 
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Joined: Sat Mar 20, 2010 8:36 pm
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Location: Germany
Have just started putting in Garth's zero-overhead service routines, it now deals with a timer interrupt that goes off each 1 second and increments a counter.

Next is the big work of moving the UART TX/RX routines from external routines into the FORTH kernal.

I keep asking why
and get the answer WHY ? MSG # 0


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PostPosted: Sat Oct 15, 2022 4:38 pm 
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cheekyfox wrote:
I keep asking why
and get the answer WHY ? MSG # 0

On the TRS-80 Model I Level I the answer was WHAT?
But carefully and slowly repeating the question had no effect. Maybe a more appropriate response would have been DUNNO.

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PostPosted: Sat Oct 15, 2022 11:10 pm 
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From another post... :)


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PostPosted: Sun Oct 16, 2022 7:05 pm 
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Joined: Fri May 05, 2017 9:27 pm
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barrym95838 wrote:
cheekyfox wrote:
I keep asking why
and get the answer WHY ? MSG # 0

On the TRS-80 Model I Level I the answer was WHAT?
But carefully and slowly repeating the question had no effect. Maybe a more appropriate response would have been DUNNO.


Each time I ask WHY? , I get a different answer! :lol:


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