Register renaming in the 65816?

[jeffythedragonslayer]

Does the 65816 use register renaming? Some instructions sound like they would be somewhat easy to implement with register renaming:

• XBA
• XCE
• TXY
• TYX

Because both registers (or bits, in the case of XCE) being swapped are the same size.

[BigEd]

I would doubt it, although it's possible - the Z80 does this, in several different ways, it relabels things rather than moving data.

Edit: not sure if we could know, short of reverse engineering the chip.

[jeffythedragonslayer]

I looked at viewtopic.php?p=15729

Would this be in transfer switches or register transfer logic?

[BigEd]

I think the way register renaming needs to work is to have something by way of a register address - even if only one bit - such that the register access is done through a decoder and the decoder's action is modified by the renaming map.

In the very simplest case, that XBA is done as a rename, it means that A and B are accessed - always - through an indirect bit which says which is which.

But a look at instruction timings tells us that the Txx instructions take two cycles, whereas XBA takes three. So XBA is doing more work than a single operation, and so we can, I think, conclude that XBA is actually shuffling A and B contents - it's not renaming the two.

But but but, XCE takes only two cycles, so there is mechanism in there to swap two bits (just two bits!) efficiently, or there is mechanism in there to access those two bits through an indirect which-is-which bit.

[BillG]

BigEd wrote:

I would doubt it, although it's possible - the Z80 does this, in several different ways, it relabels things rather than moving data.

I have always liked being able to exchange DE and HL in four cycles and wished that instructions existed for BC <-> HL and BC <-> DE. Reading that page explains why that is not the case.

[Dr Jefyll]

My 1988 KK Computer uses register renaming... even though the term itself was unknown to me at the time.

KK is a 65C02 augmented with 6 new registers and 44 new instructions. Register K0 is the default source for address bits A23-A16, and thus has similarities to PBR and DBR on the 65C816 (also unknown to me at the time).

As the homegrown mnemonics imply, a far jump or far call (JMP_K3 or JSR_K3) uses K3 to specify the new A23-A16.

This is accomplished by an apparent swap of K3 with K0. But, as Ed explained, it isn't actually the register contents that change. Instead, there's an XOR gate that changes the behavior of the decoding mechanism that selects K3 as opposed to K0.

-- Jeff

KK Register Diagram.png (8.39 KiB) Viewed 784 times