Adrian Black had two episodes talking about making a diagnostic ROM for TRS-80s, coincidentally:
https://www.youtube.com/watch?v=Hh8dRgtu1Jk and
https://www.youtube.com/watch?v=4fuuyLiSgsE&t=955s. Some ideas could be taken from there. Specifically, he mentions the use of March tests to detect some SRAM failure modes such as two locations being linked, which might help solve for the zero page aliasing issue BigEd mentioned.
On my side, I'm working on a 16-bit checksum in 65C816 assembly. I initially looked at using something better like Fletcher that is more thorough than a sum, but the algorithm needs to add two variables, and I need a memory location for that. So I went back to a simple sum. Here is the code, assuming the ROM takes the high 32k of bank zero, and M=X=0. The ROM would have to work in the reset vector region and the checksum region for this code to execute fully, so the type of failure mode it detects is limited (not sure about common modes of failure for ROMs?)
Code:
ldx # $7FFE
lda # 0
- clc
adc $8000, x
dex
dex
bpl -
cmp # 0
beq checksum_ok
; put error handler here