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Hardware design tipps

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fachat

Post subject: Hardware design tipps

Posted: Sat Jul 09, 2022 8:48 pm

Joined: Tue Jul 05, 2005 7:08 pm
Posts: 1042
Location: near Heidelberg, Germany

I've recently seen the breakdown of the Aegon Light schematics and PCB design. While not particularly 6502-related, the author goes into great detail explaining how to design the PCB for best high speed (clock & transitions) performance. Quite a lot of handy tipps! https://youtu.be/1gVx7XcETuM

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akohlbecker

Post subject: Re: Hardware design tipps

Posted: Fri Aug 19, 2022 9:28 am

Joined: Sat Jul 24, 2021 1:37 pm
Posts: 282

That was an informative watch. Thanks for sharing!

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GARTHWILSON

Post subject: Re: Hardware design tipps

Posted: Sat Aug 20, 2022 9:17 pm

Joined: Fri Aug 30, 2002 1:09 am
Posts: 8539
Location: Southern California

Unfortunately this video is not giving very good advice.

bypass capacitors: No, you don't need three values anymore. Industry guru Eric Bogatin skewers the three-capacitor bypass thing (you know, the 10uF, 1uF, and .1uF or similar), in the ten minutes starting at https://www.youtube.com/watch?v=y4REmZlE7Jg&t=1550s (cued up). He says that recommendation is no longer valid with SMT parts, and shows that a 22uF SMT capacitor has much lower overall impedance even in the high frequencies than a leaded 0.1uF capacitor does.

piezoelectric element: No, you don't need an amplifier, or even a series capacitor. Piezoelectric elements already act as mostly a small capacitor in the range of .02µF. At audio frequencies (which is their only application), they take negligible current.

In his schematics, he has tags joining places that are not far apart. Please just show a wire. Don't make us search for tags.

ground on the USB connector: He sure messed that up!

Differential pairs is something we don't deal with much (if at all) in 65xx work; but since he mentioned it: It is worth noting that the return current for each line in the differential pair is mostly in the ground plane, not the other line. See https://www.youtube.com/watch?v=icRzEZF3eZo&t=1920s (cued up). You only need to watch for a few minutes. Then he (Eric Bogatin) segues into crosstalk between lines. I frequently see advice to separate the lines by three times their width; but that should instead say to separate them by three times their separation to the reference plane, regardless of their width (although the multiplier will depend on how much crosstalk is acceptable).

His PESD3V3L1BA transient voltage suppressor diodes have a typical capacitance of nearly 100pF which might be a problem in some cases. It also takes up to 8V for 1A clamping current, and by that time the ICs' onboard static-protection diodes will already be blown. If an IC doesn't have any such input-protection diodes, the TVS will definitely be good. Otherwise I question the value. I think it would be better to use small Schottky diodes to power and ground.

He did get the thing about all the ground vias mostly right. However, if he were to swap the lower signal layer and the Vcc layer, the Vcc layer's distance to the ground plane won't be much different, and all signal traces can then reference the ground plane. They normal stack-up on 4-layer boards is this way

Code:

     ___________
     ___________

     ___________
     ___________

with .010" separation between layers 1 & 2, .040" separation between layers 2 & 3, and .010" separation between layers 3 & 4.

The following is from the bottom of the AC-performance page of the 6502 primer:

You must Unlearn what You have Learned, from 10/30/20, on Altium's channel
Robert Feranec's channel with many PCB-design videos
Designing the Signal Return Path Through the PC Board - Susy Webb - Expert Live Training 11/18/19, on Altium's channel
Eric Bogatin on Breaking Bad Habits in PCB Design - AltiumLive Keynote 10/12/19 on Altium's channel
Making and Breaking PCB Design Rules with Carl Schattke - AltiumLive Keynote 10/24/19, on Altium's channel
What Every PCB Designer Should Know - Return Current Path (with Eric Bogatin) 10/1/20, on Robert Feranec's channel
Do You Really Need Power Planes? Are you sure? | Eric Bogatin He shows why a power plane is not particularly helpful in our work, and in fact you can even do better with two adjacent ground planes. Near the end, he also touches on the folly of copper pours which are usually done incorrectly.

(and of course after you've watched one or more, you'll get suggestions for related videos down the right side of your screen.)

Eric Bogatin has a book out, "Bogatin’s Practical Guide to Transmission Line Design and Characterization for Signal Integrity Applications" which I'd like to get, but I can't bring myself yet to pay $100 for it! https://www.amazon.com/Practical-Transm ... B089YYPRH8

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GARTHWILSON

Post subject: Re: Hardware design tipps

Posted: Fri Nov 18, 2022 8:02 am

Joined: Fri Aug 30, 2002 1:09 am
Posts: 8539
Location: Southern California

GARTHWILSON wrote:

However, if he were to swap the lower signal layer and the Vcc layer, the Vcc layer's distance to the ground plane won't be much different, and all signal traces can then reference the ground plane. The normal stack-up on 4-layer boards is this way

Code:

     ___________
     ___________

     ___________
     ___________

with .010" separation between layers 1 & 2, .040" separation between layers 2 & 3, and .010" separation between layers 3 & 4.

I asked DirtyPCBs what the normal stackup was for 1.2mm-thick and 1.6mm-thick boards in 4-, 6-, and 8-layer, and here's the answer I got:

Quote:

Note that the inside layers' copper thickness is only half that of the outside layers', ½oz instead of 1oz, meaning .0007" instead of .0014".

I drew this up approximately to scale, to give a better visual idea. (I did not do the 1.2mm 8-layer.)

Attachment:

layerSpacing.gif [ 32.68 KiB | Viewed 1148 times ]

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

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