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PostPosted: Tue Jul 05, 2022 10:36 pm 
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Dr Jefyll wrote:
It may seem natural to think of Native Mode as being something that turns on many extra capabilities. But I think better insights are revealed if we switch things around and think of Emulation Mode as something that turns off certain capabilities.

Chad needn't be concerned about getting stuck in a non-zero bank. He can jump out of that bank just as easily as he jumped in. :)


Thank you Jeff, and Ed. I think I am seeing it more clearly now.

I asked Garth a long while ago about emulation mode on the '816, and his tl;dr response was "just go to native mode". Now I am seeing why. Yes, the '816 can act like a '02, it can run '02 code, but it is not an '02. I think that is what I need to keep in mind.

I altered the original image some, as per BDD's request to leave the E pin unconnected.

But now I have a new situation, given the topic at hand:

Say I design a 65C816 circuit for a drop-in 65C02 replacement. As in, if I put an '02 into the same slot on the board, it would run, albeit not at full potential. Back to the banking. The '816 starts in emulation mode, and in Bank 0. It tells the '573 that it is in Bank 0. But an '02 cannot tell the '573 anything. We would probably get mush, whatever happens to be on the databus at the time. Our banking situation could go wild! Unless I stop this by using glue logic with the non-existant E pin, results will vary.

That is another reason why I was proposing the '273 with the pull-up resistor on the E pin (I guess I just forgot about it until now). If you have ability to divide down a faster clock, this shouldn't be an issue. But leaving the E pin unconnected will again get varied results.

Any thoughts?

Thanks!

Chad


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PostPosted: Wed Jul 06, 2022 1:06 am 
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sburrow wrote:
I asked Garth a long while ago about emulation mode on the '816, and his tl;dr response was "just go to native mode".
Hmmm... I'm not sure how I could have miscommunicated like that. What I said on 6/21/22 was:
Quote:
Emulation mode:
  • keeps the 6502's vector locations
  • forces direct page to be zero page, like the '02
  • forces the high byte of the stack pointer to be 01
  • keeps you from being able to select 16-bit-wide registers
It does not keep you from using long addressing or other new addressing modes or instructions (although some of them would be rather useless in '02-emulation mode).
and the next day:
Quote:
You can access other banks in emulation mode too; but if you try to run code in other banks and get an interrupt, the bank byte won't get saved. You might want to check with BDD or others who have actual '816 hardware running. My only hands-on experience running actual code is the '802 which drops into a 6502 socket and does not give access to the other banks, regardless of what's in the bank registers.

Oh, now I remember what you might be thinking of. In January I said,
Quote:
But if you're going to do bank switching, the '816 does it far more gracefully than the '02 can.

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PostPosted: Wed Jul 06, 2022 1:28 am 
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GARTHWILSON wrote:
sburrow wrote:
I asked Garth a long while ago about emulation mode on the '816, and his tl;dr response was "just go to native mode".
Hmmm... I'm not sure how I could have miscommunicated like that. What I said on 6/21/22 was:


It was more of a 'feeling' than anything. You yourself might not have said it like that, but that is what I got from the conversation. "If you are using an '816 anyways, why restrict your abilities?" basically.

I know my proposal is a silly one: Why would I want to shove an '02 into a '816 slot? Maybe it's just for the fun of it.

Thanks!

Chad


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PostPosted: Wed Jul 06, 2022 1:42 am 
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Quote:
I know my proposal is a silly one: Why would I want to shove an '02 into a '816 slot? Maybe it's just for the fun of it.

I, too, have considered making a board that could accommodate either one, with a few jumpers to make the selection.

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PostPosted: Wed Jul 06, 2022 2:57 am 
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sburrow wrote:
But an '02 cannot tell the '573 anything. We would probably get mush, whatever happens to be on the databus at the time. Our banking situation could go wild!
Yup. But perhaps a different solution can be applied.

Since you're already talking about removing an '816 and plugging in an '02, perhaps you'd be willing at the same time to remove the '573 and plug in a male connecter with IC-like pins. The connector would be wired so that those pins which correspond to the 573's Q outputs --ie, the Bank Address lines -- would attach to connector pin 10; ie, Gnd.

Or, forget about the male connecter and, when running an '02, simply leave the '573 socket vacant. You'd have pulldown resistors permanently connected on the mobo, and they would pull the Bank Address lines low (but only when the '573 is absent).

-- Jeff

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PostPosted: Wed Jul 06, 2022 3:21 am 
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sburrow wrote:
But an '02 cannot tell the '573 anything.

When I tried a 65C02 on my 65816 breadboard build I just removed the '573 and tied any bank address lines low. Not exactly a drop-in replacement and much more of a hassle on a PCB!


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PostPosted: Wed Jul 06, 2022 5:46 am 
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It feels to me that you'd be OK using the NC pin as a E signal with a pullup.

If the datasheet tells you not to connect it, that could either be because it's used internally (for testing, or an option that's not advertised) or because it might in future be used internally for something. If the datasheet also tells you it's not used internally, I think you're OK. WDC are not still developing new and exciting pinouts for their 'C02 offering.


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PostPosted: Wed Jul 06, 2022 6:48 am 
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BigEd wrote:
Hoglet's trace decoder does not require, but recommends, SYNC be connected. Then again, none of the above have an '816 angle.)

The 65xx bus trace decoder does have full 65816 support, see the 65816 Bus Decoder thread on Stardot.


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PostPosted: Wed Jul 06, 2022 8:42 am 
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Oh goodness, big oops - thanks for the link.


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PostPosted: Wed Jul 06, 2022 10:43 am 
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Dr Jefyll wrote:
Or, forget about the male connecter and, when running an '02, simply leave the '573 socket vacant. You'd have pulldown resistors permanently connected on the mobo, and they would pull the Bank Address lines low (but only when the '573 is absent).


I don't know what a 'mobo' is, but I get the idea. Pull-down resistors on the bank lines.

BigEd wrote:
It feels to me that you'd be OK using the NC pin as a E signal with a pullup.

If the datasheet tells you not to connect it, that could either be because it's used internally (for testing, or an option that's not advertised) or because it might in future be used internally for something. If the datasheet also tells you it's not used internally, I think you're OK. WDC are not still developing new and exciting pinouts for their 'C02 offering.


Yes I am perfectly ok with using a pull-up on NC/E! It ties nicely with the '273 (again, as long as you can divide the clock down to latch the banking data properly). Thank you for this better understanding of the NC pin.

GARTHWILSON wrote:
I, too, have considered making a board that could accommodate either one, with a few jumpers to make the selection.


Jumpers are nice, but I personally do not like using them. But that is literally just me. They sure would make a lot of things easier though.

Thank you all!

Chad


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PostPosted: Wed Jul 06, 2022 12:19 pm 
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My approach is changing or reprograming the CPLD when switching processors.
Bill


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PostPosted: Wed Jul 06, 2022 12:56 pm 
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plasmo wrote:
My approach is changing or reprograming the CPLD when switching processors.
Bill


Same here—I actually have a (very untested) version of my SBC on the drawing board that could take both with a reprogram of the CPLD.

I have also been looking into a way to program the CPLD in-circuit without having to use any external hardware… my SBC includes an independent co-processor that can speak to the outside world over serial and/or Wi-Fi, and so I've been toying with the idea of using it to send SVF commands to the CPLD over JTAG, negating the need for a specialized programmer like the USB Blaster (or, as Intel now imaginatively calls it, the “FPGA Download Cable”).


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PostPosted: Wed Jul 06, 2022 1:20 pm 
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A SVF player to reprogram the CPLD is an interesting idea. If you open up an USB blaster clone…uh, FPGA download cable, you’ll see an USB-to-parallel-serial-JTAG chip. So perhaps it’s possible to design a dual-use hardware that serves both as a serial port to USB adapter as well as SVF player?
Bill
Edit, uh sorry drifting off topic…


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PostPosted: Wed Jul 06, 2022 2:03 pm 
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sburrow wrote:
I don't know what a 'mobo' is, but I get the idea. Pull-down resistors on the bank lines.


Just popping in real quick to say that "Mobo" is a somewhat common shorthand way of saying "Motherboard".


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PostPosted: Wed Jul 06, 2022 5:54 pm 
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plasmo wrote:
My approach is changing or reprograming the CPLD when switching processors.
Bill


I knew I would have to at least reprogram the ROM, obviously different code for different processors. But in this way, you get to reprogram the board itself even!

Proxy wrote:
sburrow wrote:
I don't know what a 'mobo' is, but I get the idea. Pull-down resistors on the bank lines.


Just popping in real quick to say that "Mobo" is a somewhat common shorthand way of saying "Motherboard".


Thank you. I'm still the new guy here, and will be that way for, oh, years :) I'll pick up on the 'slang' eventually.


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