Trying to decipher the mysteriously confusing WDC 65c02 SXB

[Aloha6502]

So this totally opens up a whole new gameplan!!!!

I can write a new program to the Flash ROM at the other bank locations, and then manually switch the bank, then GO to the program (via the Java Monitor).

The program should copy itself to RAM, then run itself.

(The program can even reprogram the Flash ROM, to replace the startup boot code and the USB interface handler. However to do this I need to study and understand how to work the FTDI chip. I have zero idea how to do this, will probably check the data sheet and then turn on the oscilloscope.)

I am thinking to try to do a new interface using the PIA and then connect to my laptop using a UART dongle, then do the FTDI USB later. This SXB board comes with a PIA and two VIAs. Using the PIA can save the other VIAs for other usage (really, just save the exposed VIA port, because the VIA TIDE is used internally, including for this bank switching).

To write to the EPROM, I think I will just brute force it by creating a new program to be run at Bank 0, and then literally copy and paste $FF and the Bank 3 WDC boot program (which probably the Java monitor requires) at the correct location for the huge Flash ROM.

The ROM file seems to just be a straight raw binary, with no encoding. I can even read it via Sublime text editor. So hopefully I can just cut and paste text to make a new binary file to overwrite the EPROM.

(I bought a few extra PLCC of the Flash ROM to experiment with. You can see I labeled the EPROM with "70" which means 70ns, the default that comes with the SXB. You can also buy a 55ns version.)

[CountChocula]

Very nice! It's always so satisfying when you figure these things out and they start working

[Aloha6502]

CountChocula wrote:

Very nice! It's always so satisfying when you figure these things out and they start working

haha yeah. I just consider it like a real-life RPG.

Not THAT kind of LARPING though. No wielding fake swords and wearing DIY chainmail.

[Aloha6502]

Confirmation of banks changed.

Banks 0 through 3.

[CountChocula]

Very interesting… were able to take a look at what the interrupt vectors look like in the other banks? I'm really curious to see what happens if you get an interrupt when you're in anything but bank 0…

[Aloha6502]

CountChocula wrote:

Very interesting… were able to take a look at what the interrupt vectors look like in the other banks? I'm really curious to see what happens if you get an interrupt when you're in anything but bank 0…

Looks like there are no provisions for anything if you swap the banks away from Bank 3. (Bank 3 is the default startup one, at the highest ROM address level).

All 0, 1, and 2 just $FF default blank.

[Aloha6502]

There is a "S19 Load" command. Not really sure how to utilize it. Looks like it can load ROM image files.

https://en.wikipedia.org/wiki/SREC_(file_format)

"This file format may also be known as SRECORD, SREC, S19, S28, S37. "

[Aloha6502]

S19 Format

This is in contrast to the Intel Hex format described by Garth

http://wilsonminesco.com/16bitMathTables/IntelHex.html

[Aloha6502]

The monitor tool I have been using was developed by Andrew Jacobs.

Hopefully he will have time to chime in and help out! Haha!

https://github.com/andrew-jacobs

https://github.com/andrew-jacobs/w65c02sxb-monitor

[BigEd]

Unfortunately, Andrew is no longer with us:
Andrew Jacobs (BitWise) has passed away
but it's great that his work lives on.

[Aloha6502]

BigEd wrote:

Unfortunately, Andrew is no longer with us:
Andrew Jacobs (BitWise) has passed away
but it's great that his work lives on.

Terrible news.

[Aloha6502]

Vision for this project;

Have an onboard monitor with assembler, accessible via USB to a computer running a serial terminal program (ideally CoolRetroTerm haha)

Next steps;

A) Choose a monitor (I think I will go with SYSMON65)

https://github.com/jdimeglio/SYSMON65

I believe Joe Dimeglio is active on this forum (who isn't from the 6502 world!)


b) Figure out how to use the FTDI USB interface to handle serial connectivity to a computer.

(Datasheet attached)

[Aloha6502]

The FTDI FT245RL is connected to one of the 65c22 VIAs.

I'm not sure what kind of code is available to handle the activity between these two chips, and the expected serial handshaking and data exchanges.

[Aloha6502]

I've searched this forum for "FT245RL" and found a bunch of posts that I don't understand.

But this webpage gives some basic hint how the FTDI chips work:

https://www.ecstaticlyrics.com/electronics/USB/FT240X/

This describes the FT240X but might be similar enough to the 245R that some info can be gleaned about how to control the data stream.

Quote:

Power is applied to (or received from, if USB-powered) the top left pin (positive) and the bottom-right pin (ground). The eight pins on the bottom are the data bus, delightfully sorted into numerical order unlike the chip itself. At the top right, the sequence FTRWR represents these signals, all of which are active-low.

F: The "SIWU#" pin, which flushes data in the FIFO to the PC immediately.
T: The "TXE#" pin, which indicates when data may be written to the FIFO.
R: The "RXE#" pin, which indicates when data is available to be read from the FIFO.
W: The "WR#" pin, which writes data into the FIFO to be sent to the PC.
R: The "RD#" pin, which reads data from the FIFO which came from the PC.
The other pins labeled 5 & 6 are the "CBUS5" and "CBUS6" pins, the exact function of which is configurable via USB using a utility from FTDI, but by default you can simply ignore them. The SIWU# pin (the one labeled "F") may also be ignored if you don't care to utilize it.

[Aloha6502]

Bought this to experiment with.

Jumper selectable 3.3 or 5v.