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PostPosted: Sat May 21, 2022 4:42 am 
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This is a little silly, but it solved my problem of not being able to read SEP/REP so I'm dropping the tip here. I think nvmxdizc should be pronounced "nevermind x disc."


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PostPosted: Sat May 21, 2022 5:16 am 
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Just put the manipulation in macros so you don't have to remember it, and source code becomes a lot more readable. I called mine ACCUM_16, ACCUM_8, INDEX_16, and INDEX_8. I think BDD called his LONGA, SHORTA, etc..

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PostPosted: Sat May 21, 2022 5:37 am 
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jeffythedragonslayer wrote:
This is a little silly, but it solved my problem of not being able to read SEP/REP so I'm dropping the tip here. I think nvmxdizc should be pronounced "nevermind x disc."

As Garth said, use macros so you don't have to memorize the bit patterns for REP and SEP. My macros are:

  • LONGA — set the accumulator and memory accesses to 16 bits: REP #%00100000

  • LONGR — set all registers to 16 bits: REP #%00110000

  • LONGX — set index registers to 16 bits: REP #%00010000

  • SHORTA — set the accumulator and memory accesses to 8 bits: SEP #%00100000

  • SHORTR — set all registers to 8 bits: SEP #%00110000

  • SHORTX — set index registers to 8 bits: REP #%00010000

Incidentally, the "P" register is SR, which is the designation used in almost all machine language monitors used with the 65xx family. Also, REP and SEP can be used to manipulate any of the bits in SR, not just m and x.

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PostPosted: Sat May 21, 2022 6:27 am 
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Come on BDD, you know full well that this SP notation is just another of your idiosyncrasies. It's just as common, if not more so, to call the P register P, as in the mnemonics PHP, PLP.

You really ought to quit this bad habit of announcing things as facts when they are not. It weakens your reputation.


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PostPosted: Sat May 21, 2022 7:29 am 
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BigEd wrote:
Come on BDD, you know full well that this SP notation is just another of your idiosyncrasies. It's just as common, if not more so, to call the P register P, as in the mnemonics PHP, PLP.

You really ought to quit this bad habit of announcing things as facts when they are not. It weakens your reputation.

Almost all extant 6502 machine code monitors refer to the status register as SR in the register dump display—also, the stack pointer is referred to as SP. Take a look at the first attachment, which is the January/February 1980 issue of Transactor magazine. In it is an article about Supermon for the Commodore PET. On page 17, the .R (register display) command is described, complete with an example of what a register dump looks like. You’ll have to rotate the page view clockwise.

The second attachment is an excerpt from the January 1983 issue of Compute, in which there was an article about Supermon 64. If you scroll down, you will see how the register dump appears.

Supermon had a number of contributors to its design, Steve Wozniak indirectly being one of them. Jim Butterfield was the one who took the bits and pieces and created the actual Supermon package that was used by innumerable Commodore M/L programmers. He then ported it to the C-64. Commodore, in turn, ported it to the C-128. I got a lot of use from the C-128’s monitor (and the C-128's reset button) when I wrote the truck leasing and billing system. :D

Incidentally, I wrote a number of articles that were published in Transactor.

Attachment:
File comment: Transactor Magazine
transactor_v2_i08.pdf [1.94 MiB]
Downloaded 109 times
Attachment:
File comment: Compute Excerpt w/Supermon 64
supermon64.pdf [437.53 KiB]
Downloaded 112 times

——————————
Edit: Fixed a typo.

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Last edited by BigDumbDinosaur on Wed Jun 01, 2022 7:25 pm, edited 1 time in total.

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PostPosted: Sat May 21, 2022 7:54 am 
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Indeed, Supermon is an example of one particular notation. And the mnemonics we all use constitute another example. Including the REP and SEP which motivate this thread. (Oh, also the datasheet, and Zaks, and Leventhal...)


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PostPosted: Sat May 21, 2022 11:35 am 
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The nice thing about conventions is that there are so many to choose from (paraphrasing Tanenbaum).


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PostPosted: Sat May 21, 2022 3:18 pm 
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Attachment:
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Capture.PNG [ 4.36 KiB | Viewed 1721 times ]

Quod erat demonstrandum.

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PostPosted: Sat May 21, 2022 4:24 pm 
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And the mnemonics we all use constitute another example. Including the REP and SEP which motivate this thread.

Quote:
The nice thing about conventions is that there are so many to choose from (paraphrasing Tanenbaum).

It would be nice if all the terminology were consistent; but alas, we even have BBR (branch on bit reset), RMB (reset memory bit), REP (reset processor status bit), but BCC (branch on carry clear, not branch on carry reset), BVC (branch on overflow clear, not reset), CLD (clear, not reset, decimal flag), etc.. I tend to prefer the one-letter designators so the length is consistent, like A, X, Y, S, and P (without leading dots which make left-justify look messy), but then 816's K and B are extra confusing, and then there's ADH (address high byte), ADL, and probably more I'm forgetting. I/O ICs may add confusion too, like SR being the VIA's shift register. I've never used a monitor program. I wonder if they differ as much from one to another as assemblers do in their directives. Fortunately it doesn't take much work to modify code written for one assembler to work on another. I'm sure I could find better things to get myself worked up about.

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PostPosted: Sun May 22, 2022 11:32 pm 
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FWIW, I recently changed the monitor in my JRC-1 board to use single-letter designations for all the registers that the monitor lets you modify before jumping into code, so "A", "X", "Y", "P", "S", "D", and "B". Previously "P" was "SR'", "S" was "SP", and "B" was "DB". I found I liked it better making everything one letter. It makes my command line parsing a bit easier, and as has been mentioned above, these letters match the ones used in the opcodes (except for those few opcodes that use "C" to refer unambiguously to the 16-bit accumulator, of course).

In the end, since we're all more or less the only users of our builds, use whatever you want. :)


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PostPosted: Mon May 23, 2022 3:53 am 
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For nv1bdizc in emulation mode, "never one blu-ray disc"


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PostPosted: Mon May 23, 2022 7:40 am 
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I tend to mash up and try to pronounce strings of consonants - it mightn't make any sense, but it kind of works for me!


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PostPosted: Mon May 23, 2022 11:25 am 
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jeffythedragonslayer wrote:
For nv1bdizc in emulation mode, "never one blu-ray disc"

Imagine that in 1975. So forward looking.


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PostPosted: Wed Jun 01, 2022 4:30 pm 
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I prefer F for flags because it is difficult enough to remember the properties of A, B, C and D across multiple processor architectures. However, I use P and 6516's Q because it is compatible with established, three letter opcodes.

Looking at jeffythedragonslayer's mnemonic and BigDumbDinosaur's macros, I wonder if it is useful to clear decimal flag and carry flag when using REP to enter 65816's 16 bit modes.

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PostPosted: Wed Jun 01, 2022 7:22 pm 
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Sheep64 wrote:
Looking at jeffythedragonslayer's mnemonic and BigDumbDinosaur's macros, I wonder if it is useful to clear decimal flag and carry flag when using REP to enter 65816's 16 bit modes.

Before answering, let me point out the 65C816 doesn’t have “16-bit modes.” There’s 65C02 emulation mode (which doesn’t extend to the hardware itself) and 65C816 native mode. In native mode, register “width” may be set to eight or 16 bits.

REP and SEP may be used with any bit combination desired, a feature I often employ in functions. I give each bit a name, e.g., SR_CAR for the carry bit and SR_ZER for the result zero bit, and if setting or clearing multiple bits, I OR them in the operand. For example, REP #SR_ZER | SR_CAR. The only bit that cannot be affected by REP and SEP is the hidden emulation bit E, which must be indirectly toggled via the XCE instruction.

In cases where the only thing being changed are register widths, I use the aforementioned macros (LONGA, SHORTR, etc.) to cut down a bit on typing, as well as minimize the likelihood of an error sneaking into the code.

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