i have to use 4-8mhz crystal to generate 1mhz square signal, i'm not asking how to divide this, but how to get it ticking at 4-8mhz - every generator i've used wont even start to oscilate, using integrated device is not an option
using 1mhz crystal is not an option also!
generators (can like 4 leg device) are unfortunaly too expensive it is like $4/piece in poland for such device and it vary with speed
1mhz crystal price is out of this world - $5, 4mhz crystal cost less than $0.5
since now i've tried 7404 (actually 74ls04) version, '00 version, 4063 version.. still nothing... flat line..
do i really have to use those discrete solutions? i don't have much board space to waste and i cannot use smd parts for this :/
anyone?

I wish I could help you, but I lack experience with this problem, personally. However, there is an old truism in the electronics industry: Oscillators amplify, and amplifiers oscillate.

IIRC, when building an oscillator using gates like that, you do NOT want a ground-plane, because that would suck the RF energy right out of the positive feedback loop. Also, CMOS circuits will work better than TTL circuits, because they have a more neutral high/low switch-over point, thus producing more symmetrical waves. Though, for your application, it sounds like that's not really an issue, since you'll be dviding the waveform by 4 to 8 anyway.

hmm.. you're saing that is better to use cmos version of ics, all cicuit around use ttl levels and chips, bur in hct version - this will do, or i have to use hc version or even 74hct40xx chips?

CMOS is not incompatible with TTL for single loads; hence, if you build the oscillator with a CMOS part, you can expect to drive one TTL load with it. This probably should be a buffer so you can increase the fan-out of the oscillator.

Most "ring oscillator" built with gates is done with CMOS components. I've heard of some people doing it with LS logic, but I'm not aware of the conditions under which they've gotten it to work. I'd say 90% or more of the designs I've seen all called for CMOS logic.

Try an HC or HCT gate implementation. If that doesn't work, I wouldn't know what to do after that, except perhaps trying to build a JFET oscillator of some kind.

> hmm.. you're saing that is better to use cmos version of ics, all cicuit
> around use ttl levels and chips, bur in hct version - this will do, or i
> have to use hc version or even 74hct40xx chips?

There's little reason to use non-CMOS logic ICs these days. The CMOS is just as fast, often drives loads of 15mA, 25mA, or even more, and takes far less power. Staying with 7400 or 74LS presents more problems at least in fan-out limitations if not in power supply and cooling requirements.

4000-series logic (without the 74 in front) is very slow though compared to 74HC, HCT, AC, etc.. Without looking up timing spec.s, I don't think you could make an 8MHz crystal oscillator with 4000-series logic.

The CMOS crystal oscillator ap. note at http://www.fairchildsemi.com/an/AN/AN-340.pdf should be helpful.

I would not discourage the use of ground planes in oscillator circuits. If you were counting on a ground-plane-less circuit for the stray coupling and uncontrolled parasitics to produce the oscillation, you would not have a reliable oscillator. It is preferable to keep control of all the elements, and that's easier if you have a ground plane.

Hi Candle,

Please see this link about oscillators.

http://www.epanorama.net/links/oscillator.html

Also, seach the web for 6502 circuits in general and copy one
that someone has posted for public domain use.

Hope this helps.

Bye,

Paul

thanks for all of yours replies
i'll try to make it work in saturday, well that is if i got better :/
currently i can't look down to much on what i'm soldering because of running nose not pretty picture.. especially when i'm running out of handkerchiefs and anything else what i could blow my nose in
i did my homework before i posted here and read all documents on epanorama, section circuits, subsection crystal oscilators :] i'm not lazy guy and i hope yor're not sick and tired of people asking the same questions again and again :] and again - i don't write this to hurt anyone - you're doint great helping my ass out
cheers :]

ps. have you tryed using avasem av9107-05 and similar clock/pll generators? they were used in pc motherboards for 486 processors, and for my point of view they are valuable in that manner that i could use them to produce higher clock rates just to divide them and get all needed signal for driving 65c816 with 16mb of dram with decent speed

Gart - would be possible to use coil to shift latch signal for upper 8bits of address bus?
dalay lines are not widely avial - especialy others than for 64us

> Gart - would be possible to use coil to shift latch signal for upper 8bits
> of address bus? dalay lines are not widely avial - especialy others than
> for 64us

Although it's not clear, I will assume you're talking about latching bits 16-23 of the address bus on the 65816.

An RC time constant ahead of a schmitt-trigger gate input would be better, and easy to adjust. It would be good to build the circuit without anything special there first-- just one more gate delay between the clock source and the LE input of the 74AC573 than there is between the clock source and the processor's phase-2 input-- and then turn up the clock speed little by little and find out how fast it'll go before it quits working. That will give an idea of what time difference you'll need in order to go faster. If you're at the lower clock speeds of 4 or even 8MHz, it shouldn't be an issue. It only gets more demanding when you're looking to get into the 10-20MHz range. Of course remember that if you don't need more than 64K address range, it is not necessary to use or even latch the high 8 bits if you don't want to, so you can forget about the 74AC573 altogether. You'll still get tons of benefits from going to the '816.

Garth, i'm thinking about running at 28mhz for memory controller, thus producing 3.5mhz for vga output, and 65c816 running at little over 14mhz (less than 14.2mhz)
rc network won't be too vulnerable for temperature changes?
this goes into standard envirotment, no extreemes, i'm just carefull
and for memory - i'll be using full address space
this is ofcourse all big IF because still no place to buy 65c816 in poland :/
and your assumption is 101% correct :]

> rc network won't be too vulnerable for temperature changes?

Not enough to matter for this kind of thing. If you had to have accuracy for the timebase itself without a crystal, that would be another matter. If you had to do that, you could still hold it within 20ppm total with the right components (especially capacitors with controlled temperature coefficients). But you don't need to worry about that if you just need, for example, a delay of 15 ns plus or minus 3ns (20%). The ICs do slow down a little at higher temperatures. I'm sure they would vary a lot more than good resistors and capacitors do-- even trimmers.

As for getting an '816 in Poland, I'm sure Mike would have no problem sending one there.

3.5MHz for the VGA output, as in dot clock? With a horizontal refresh rate of 31500Hz (the lowest an SVGA monitor will support today), that amounts to a horizontal total of 111 pixels. You have to subract horizontal blanking and syncing time as well; thus, I suspect you'll have at most 90 pixels of usable graphics.

To get 640 pixels across on a display, the VGA card clocks its pixels out at 25.2MHz, and has a horizontal total of 800 pixels. In text mode, the VGA card is actually displaying 720 pixels on the display, giving a horizontal total of 900. The text-mode dot clock rate is 28.35MHz.

my fault, i though about 7mhz, at 3.5mhz it works now producing 320x200 and 1bit/pixel at 15.65khz of line frequency

Weird -- I still only get 223 pixels given those frequencies, only 200 of which could ever be visible (22 pixel times would be devoted to sync/blanking). You would need at least (15650 Hz)(320 pixels) = 5.008MHz for the dotclock to get a true 320 pixels on the display. And this doesn't consider blanking or syncing; that might require an additional MHz or two (figure 400 pixels on a line, 320 of which are visible on the screen, then you need 6.26MHz for the dotclock).

Are you using the high AND low halves of the clock signal? In other words: (a) A new byte is loaded every four cycles, (b) every edge, both rising and falling, causes a bit to be shifted? If so, then this is equivalent to using a 7MHz clock, which would meet timing constraints.

Remember the Commodore 64 used an 8.064 MHz dotclock for the NTSC version of its VIC-II chip (HT=512 pixels even), and IIRC, 7.36 MHz for its PAL version (HT=470 pixels) to get a 320 by 200 pixel display. About 51/47 (NTSC/PAL) pixels were used for horizontal timing requirements, and 141/103 (NTSC/PAL) pixels were used for the border around the actual image. (NOTE: My numbers are estimates, based on back-of-the-envelop simple math, and does not constitute a detailed analysis.)

In your circuit, you obviously can decide whether or not you want a border. The advantage to the border is that your generated image doesn't go off into the television's overscan area. The disadvantage is that it increases the dotclock (since you have more pixels per horizontal line) somewhat.

For dotclocks in arcade games, the most common crystals are 14.318 and 18.432 MHz. I think the Apple ][ also used a 14.318, but I am not sure.

Try using those as divisors, see what comes out...

_________________
"My biggest dream in life? Building black plywood Habitrails"

For 640x4?? displays, 14.318MHz is reasonable. For lower resolution displays, it's not.

The dot-clock for the Apple II couldn't have been 14MHz -- not with pixels the size of cynder blocks, even for that era of computers. I can believe it is the base frequency from which everything else is derived though (however, even there, I don't think it was, as the CPU's frequency wasn't an even power of 14.31818MHz, IIRC).

Maybe in the IIgs, which did support a proper 640x400 display.