I am assuming the code samples are for DASM, as that seems to be a popular choice for 2600 coding, and it has an RORG directive.
Quote:
org $f000
As Garth said, this sets the address where the assembler will put the code, but in the case of a cross assembler like DASM, the code is not
placed in the specified RAM address, but written to a file of course.
ORG also sets the address that the assembled code
thinks it is located at.
Code:
processor 6502
org $f000
here jmp here ; assembles as "jmp $f000", or "4c 00 f0" in hex
Note that nothing is output before the first actual instruction (jmp), so it does
not put the jmp instruction at position $f000 in the file, but
the instruction looks like it was placed at that address (assemble with -f3 command line option to get the raw assembler output without any headers).
Quote:
org $80
This makes little sense by itself, as $80 is the start address of RAM on the 2600, and you don't assemble to a RAM address with the 2600, as the code will not not be loaded to RAM from disk like on a computer, but rather run directly from ROM (you could of course copy code from ROM to RAM at runtime, but that is another issue - see below).
"org $80" does make sense in conjunction with DASM's uninitialized segments, however:
Code:
seg.u ram
org $80
my_var ds.w 1 ; reserve 1 word
another_var ds.b 3 ; reserve 3 bytes
third_var ds.b 1 ; reserve 1 byte
This generates no code or data during assembly, and is equivalent to the following definitons:
Code:
my_var EQU $80
another_var EQU $82
third_var EQU $85
The advantage of using a segment is that you don't have to keep track of the individual addresses yourself.
Quote:
rorg $FFFA
This would be the "relocatable ORG" directive of DASM. It does not change where the code is placed, but it changes where the code
thinks it is being placed. This is helpful for writing memory-banked code or code that is copied to it's final location at runtime.
The following example will produce an 8K ROM image (again, with the -f3 option), consisting of two identical 4K blocks:
Code:
processor 6502
org $1000 ; bank1 starts at file position 0, memory address $1000
bank1 jmp bank1 ; jmp $1000
org $2000 ; bank2 continues at file at position $1000, memory address $2000
rorg $1000 ; but code thinks it is located at $1000
bank2 jmp bank2 ; assembles as "jmp $1000", would be "jmp $2000" without the RORG
rend
ds.b $3000-*,$ff ; pad to 4K boundary
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