Hello everyone!
I am starting a new topic because I don't want to clutter the last one. A link back to the original is here:
viewtopic.php?f=12&t=6818I just posted a link to this topic on the last one as well.
Anyways! Attached is my Version2 schematic in B&W PDF form, and two pictures of my 4-Layer PCB layout in PNG format. I'm using KiCad, so if anyone wants those filetypes instead, I can supply them.
I'm posting them here, mainly as an update, but also to see if y'all spot any glaring mistakes. I've been through it a few times, and will go over it a bit more before I send off for the boards to be made.
They should be the 10cm x 10cm size, which JLCPCB sells for $8 right now, so I am taking advantage of that. Once I get BoardOne running as expected, I plan on soldering it to BoardTwo with those expansion pins, making it 10cm x ~20cm.
Thanks to all of y'all who have helped me thus far! Hoping that V2 will work more often than just... sometimes.
Chad
EDIT:
This will be using the W65C02 with a single W65C22 for nearly all of it's I/O (hence the name of the topic). 4-Layer board, 62256 32K SRAM, 28C256 32K EEPROM (with option to write to it from this 6502), and using a 74HC688 and 74HC00 for address finding and glue logic. I'm planning on running it on a 1 MHz oscillator, and powering it through USB. Definitely nothing fancy here, doesn't even have a power switch or power LED. I put a small 'expansion' place on the top-right for fun, and I have a hole near-ish to the top-left to run wires through in case I need to do surgery. Each chip will be in a socket, and so I put the capacitors underneath the chips themselves if possible.
I also added a white-background PDF version of both boards. Likewise, looking at dimensions as I was gathering parts online, I found I needed more room for my polarized capacitor in the top-left corner. So I had to adjust a few things to make it fit.
Lastly, I already ordered the board to be printed. I'll let you know how things go whenever it comes in.
Thanks!