My understanding from reading the 816SXB datasheet is the same as yours. I read it as the A16-A23 lines on J1 are the demultiplexed upper byte of the memory address to allow adding your own memory decoding logic. The XCS0B-XCS2B lines look to me to be for peripheral chip selects.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

Well... It seems that the lack of knowledge and experience in several areas including language on my part has made me unable to express my question the best way.

I didn't mean anything by way of personal criticism, there, tokafondo - I was just musing on the nature of conversational dynamics on a forum like this.

One of the perils of a forum is the idea that the forum has a certain opinion or perspective: in reality, the forum is a collection of diverse people, some who post often and some who post rarely or never. Some will be strident, or combative, while others will be conciliatory. Some will have a wide area of interest, others will be narrow. Some will like to stay on topic and others will like to go off on tangents.

There is no group mind, no consensus. A few people, generally, will be the most frequent posters and will tend to appear in a lot of threads, for better or worse. There will be a tendency for them to pull conversations in particular directions, just because they post often, but that shouldn't be read as a consensus.

The 816, as it happens, is quite polarising, because it's a compromise: it was designed to have a degree of compatibility and also to have some improvements. We've had several threads aiming to give an overview of that situation, and Garth and BDD have offered their own summaries too. In the end, opinions differ.

The thing to do, I think, is to ignore the argumentation, and to focus on what you want to do in your own project: we've seen several successful 816 projects, and there's a thread which collects those, and we've seen several '02 projects which have their own approach for addressing more memory, or for getting more work done per clock tick.

It comes down to a matter of taste, and it's surely not worth much effort trying to convince someone that their preference is wrong.

Edit: here a few relevant threads - the forum search allows searching in titles and in head posts, which is a good way to find threads.

65816 vs. 6502 + MMU
Managing the 65816 multiplexed bus
65816 system engineering pros and cons
On the usefulness of 65816 as a 65C02 alternative

and

List of 65816 Systems - Old/New; Commercial and Home-brew
Survey of '816 systems... (65816 / 65C816)
How to demonstrate advantages of 65816?

Thanks.

I understand the diversity of people gathering here.


This thread was about having a way to have an adapter that would result in having a 48 PDIP thing that would be plugged in a breadboard, so a 40 PDIP '816 would be plugged in the adapter, and then the adapter would be plugged in a breadboard, so the full 24 address bus pins would be available to tinker with, just like the '265 has.

Is it useful? Is it silly? Is it a bad idea? That's everyone decision.

I think it's a moderately attractive idea - but someone has to go ahead and build it, and that's not me.

(I think I'd suggest considering using a surface mount '816 rather than a socketed one. Especially now it's become affordable to use the PCB house to act as an assembly house too.)

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

I'm definitely more of an 8-bit software guy, but I have done some breadboard work in the distant past, and I might be interested in taking up that hobby again at some point.

I don't have the hardware chops to make my own 48-pin DIP board, so I could be a prospective buyer of one of those assemblies, at least theoretically. I understand the benefits of the '816, but it would take a diligent effort on my part to get into the 16-bit groove ... my least-favorite features of the '816 are the M and X mode bits, although I certainly understand the valid reasoning for their existence. Their existence invites their use, and I find their use unpalatable. And please don't waste any effort trying to convince me otherwise ... I'm a stubborn old nerd, and the only person who has any chance of that is yours truly.

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Got a kilobyte lying fallow in your 65xx's memory map? Sprinkle some VTL02C on it and see how it grows on you!

Mike B. (about me) (learning how to github)

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Thanks. Would the '816 itself be included in the adapter, soldered to the PCB?



Thanks. This also leaves more room to have some parts in one side and some others in the other side of the PCB. Maybe support for both PLCC44 and PDIP40 variants, to be plugged in the adapter. Or even a socket for a clock can.

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Right. I/O doesn't strike me as a very good idea. So many options are available -- there's no "one size fits all."

Furthermore, it doesn't save much work because I/O is pretty easy to hook up. Unlike memory, you don't have umpteen address lines to deal with.

But putting memory on the module would be a good, solid idea, IMO.

-- Jeff

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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Thanks for advise and comments.

When using WDC's own offerings as SBCs or MCUs, users must deal with the included memory and I/O. The thing is that everything is mapped where WDC designers decided it was best. There is some flexibility with the FPGA based boards, but not complete freedom.

What does a WDC CPU need to work? clock and memory.

The 6502 can drive a crystal by itself (not recommended, WDC says), but the 816 doesn't, so an oscillator is needed for it. I wouldn't actually put an oscillator to the adapter but would leave space or a socket for it: the user would put his own can at the desired speed, or whatever needed circuit plugged to the PHI2 pin.

And then, as the goal for this adapter would be having the 24 lines of address bus available, so the logic has to be included, but the memory would be left out of it. The user would have the freedom to decide what to put where, not only memory chips but also FPGA, CPLD or whatever.

What you are describing looks kinda like this (attached photo).

2"x4" pc board with single row of 40 pins that plug into solderless breadboard. In the 40-pin connector are 16 address lines, 8 data lines, clock, reset, 6 control lines, 6 spares and +5V/gnd. A 64-macrocell CPLD provides flexibility for experimentation. It was originally designed for 6502, but only small modifications are needed for 65816. 65816's high order addresses can connect to the 6 spares.
Bill

It's an interesting thought - for some reason I'd been fixating on being moderately plug-compatible but there's no reason for that. This is not a drop-in upgrade for an existing system, but a basic module for experimenting with new systems. As such, it should have flexibility, to keep the experimentation on the breadboard, not on the module, which needs to be a frozen and reusable design.

40 pins is enough, if you choose wisely. There are several pins which are rarely used, both for the 02 and the 816.

In fact I rather like Jeff's suggestion of on-board RAM. With the 816, it's most usual to put I/O into Bank 00, and as such, bank 00 ends up being quite special and there's a lot of room for different ideas. But the higher banks are not special: generally they are just RAM, and possibly some banks of ROM. To put a 512k RAM into a selection of higher banks would not fix too much in the system - and maybe it could be disabled or unpopulated if not wanted.

For similar reasons, I would not put the clock can on this board - doing so will fix too many decisions too early.