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PostPosted: Thu Nov 11, 2021 3:43 pm 
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kernelthread wrote:
One little gotcha with these FT24x chips is that, while the RD strobe is active low, the WR strobe is active high. I almost got burnt by that one but caught it in a final check just before I sent the PCB for fabrication.

I was slower than you; I discovered FT245_WR is active high AFTER I've sent off the pc board, so that's is one of the two problems the added 74LS10 fixed. However, that's not the problem why I can't write to FT245. It is something else...

Michael wrote:
ok, wait a minute. after the 6502 performs the write clock cycle to $8000+x it will go back to read at PC in the FT245 region during the next clock cycle and that's when it will read that fifth character from the FT245. So that fifth character could actually be the opcode portion of the next instruction you'd like to send to the 6502. very cool!

Michael,
STA abs,X takes 5 cycles. The first three cycles fetch the op code from FT245, the next two cycles access the RAM so does not involve the instruction stream from FT245. So the data I sent to FT245 to execute the STA $8000,X instruction are 0x9D, 0x0, 0x80. However, as you've pointed out that the two memory cycles to RAM can not execute because FT245 receive FIFO is empty (/RXF negated), so the execution of the RAM access is suspended until next data is received in FT245's FIFO. It is somewhat confusing that the execution of current opcode is pending on receival of next opcode. It is akin to instruction pipeline such that if the pipeline stalled fetching next instruction, the current instruction won't finish execution.

In my setup Windows' TeraTerm is connected to FT245. This is the program I sent to TeraTerm to load a small NOP,NOP,BRA to NOP" in RAM and then jump to RAM to execute it.

The first five instructions (C000-C004) set the reset vector to 0xEAEA and execute one or two NOP instructions, the next instruction (C005) is an illegal instruction for synchronization purpose. This is because the reset is somewhat unpredictable and can fetch extra opcode. The illegal instruction realigns the instruction fetch so next opcode will always be treated as an instruction. From C006 to C024 are instructions to copy a simple program into RAM. You'll notice "STA $8000,x" is 9D 00 80 like a normal STA $8000,X, but "INX" is E8 03 where "03" (or any data) is needed because INX takes two fetches to FT245 to complete. The last instruction is "JMP $8000", but you may notice I have two JMP. The second JMP (actually any data) is needed to start program execution by putting a byte in FT245 FIFO so /RXF is asserted.
Bill

Edit,
Frankly it is a pain having to pad instruction stream with extra data and understanding cycle-by-cycle behavior of each instruction, so my approach is to put together a bootloader in memory, jump to it so I can load normal 6502 program.


Attachments:
Prog65_execute_bootstrap.jpg
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PostPosted: Thu Nov 11, 2021 5:44 pm 
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I found out why I wasn't able to write to FT245. It is because my TTL logic is too slow with too many cascaded logic such that 6502 can't run at 7.37MHz. The program that was loaded in RAM wasn't executing properly and wandering off somewhere. So when I changed the CPU oscillator to 3.68MHz everything is working as expected.

The attached program is actually 3 programs in one. The first part up to C06A is the bootstrap opcode stream executed by 6502 as they come out of FT245 FIFO. That part of the program build a simple loader in RAM locations starting from 0xb000. The simple loader code is in the commented section C06D; it basically loads 256 bytes of data from FT245 into 0xb100 and jump into 0xb100. So whatever 256-byte program after C06D will be loaded and run. In this case the 256-byte program writes a byte to FT245, delay a bit, increment and write the byte to FT245 again and again as the screen capture showed. That is obviously not 256 bytes worth of program so it is padded with lots of zero just so program will start.

This is a good way of loading 256-byte diagnostics, but in actual use it is a Intel Hex loader to load EPROM programming software into RAM and burn the EPROM.
Bill

Code:
000000r 1               ; 11/8/21
000000r 1               ;Instructions to be loaded into FT245 that assembles
000000r 1               ;   .org $b000
000000r 1               ;   LDX #0
000000r 1               ;loadmore:
000000r 1               ;   LDA $f000      ;get data from FT245
000000r 1               ;   STA $b100,x
000000r 1               ;   INX
000000r 1               ;   BNE loadmore
000000r 1               ;   JMP $b100
000000r 1               ; in RAM and execute it
000000r 1               ;STA index by X does not need dummy pad
000000r 1               ;INX does need dummy pad
000000r 1               ;RAM from 0x8000- 0xBFFF
000000r 1               ;FT245 from 0xC000-0xFFFF
000000r 1               
000000r 1                  .pc02
000000r 1               
000000r 1               .macro   savebyte val
000000r 1                  LDA #val
000000r 1                  STA $b000,x
000000r 1                  INX
000000r 1                  .byte 3
000000r 1               .endmacro
000000r 1               
000000r 1                  .org $c000      ;FT245 occupies space from 0xc000-0xffff
00C000  1  EA              NOP         ;reset vector plus extra padding
00C001  1  EA              NOP
00C002  1  EA              NOP
00C003  1  EA              NOP
00C004  1  EA              NOP
00C005  1  03              .byte 3         ;illegal instruction executed in 1 cycle
00C006  1                           ;for synchronization purpose
00C006  1  A2 00           LDX #0
00C008  1  A9 A2 9D 00     savebyte $a2      ;LDX #0
00C00C  1  B0 E8 03     
00C00F  1  A9 00 9D 00     savebyte $0
00C013  1  B0 E8 03     
00C016  1  A9 AD 9D 00     savebyte $ad      ;LDA $f000
00C01A  1  B0 E8 03     
00C01D  1  A9 00 9D 00     savebyte $0
00C021  1  B0 E8 03     
00C024  1  A9 F0 9D 00     savebyte $f0
00C028  1  B0 E8 03     
00C02B  1  A9 9D 9D 00     savebyte $9d      ;STA $b100,x
00C02F  1  B0 E8 03     
00C032  1  A9 00 9D 00     savebyte $0
00C036  1  B0 E8 03     
00C039  1  A9 B1 9D 00     savebyte $b1
00C03D  1  B0 E8 03     
00C040  1  A9 E8 9D 00     savebyte $e8      ;INX
00C044  1  B0 E8 03     
00C047  1  A9 D0 9D 00     savebyte $d0      ;BNE loadmore
00C04B  1  B0 E8 03     
00C04E  1  A9 F7 9D 00     savebyte $f7
00C052  1  B0 E8 03     
00C055  1  A9 4C 9D 00     savebyte $4c      ;JMP $b100
00C059  1  B0 E8 03     
00C05C  1  A9 00 9D 00     savebyte $0
00C060  1  B0 E8 03     
00C063  1  A9 B1 9D 00     savebyte $b1
00C067  1  B0 E8 03     
00C06A  1  4C 00 B0        JMP $b000
00C06D  1               
00C06D  1               ;   .org $b000
00C06D  1               ;   LDX #0
00C06D  1               ;loadmore:
00C06D  1               ;   LDA $f000      ;get data from FT245
00C06D  1               ;   STA $b100,x
00C06D  1               ;   INX
00C06D  1               ;   BNE loadmore
00C06D  1               ;   JMP $b100
00C06D  1               
00C06D  1                  .org $b100
00B100  1  8D 00 F0        STA $f000
00B103  1               delay:
00B103  1  E8              INX
00B104  1  D0 FD           BNE delay
00B106  1  C8              INY
00B107  1  D0 FA           BNE delay
00B109  1  1A              INC
00B10A  1  80 F4           BRA $b100
00B10C  1               
00B10C  1  00 00 00 00     .res 256,0
00B110  1  00 00 00 00 
00B114  1  00 00 00 00 
00B20C  1


Attachments:
Prog65_console_test.jpg
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PostPosted: Thu Nov 11, 2021 6:06 pm 
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You're probably over-thinking this problem. Make the hardware interface data/clock/program pulse or similar. Connect three or four shift registers to the bottom bits of one FT245 and program an EEPROM with a very long string of octal digits where data is bit zero, positive edge clock is bit one and /WE programming pulse is bit two. In the worst case, a binary can be converted to a suitable octal string using one line of Perl. The hardware interface also works with a 74HC574 using the same sequence of digits. If you must, it also works with Arduino. However, the software is likely to differ. It is also possible to program an EEPROM from a toggle switch panel. The panel may or may not involve a microcontroller.

This suggestion is complicated by EEPROMs which use a knock protocol prior to programming. On Unix, this can be overcome with something of the form:

Code:
cat my.bin | perl -e '$lo="46";$hi="57";$pr="7737";$a=$ARGV[0];
while(defined($_=<STDIN>)){for($y=0;$y<length($_);$y++){$d=ord(substr($_,$y,1));
for($x=15;$x>=0;--$x){if(($d&(1<<$x))==0){print $lo}else{print $hi}}
for($x=0;$x<24;$x++){if(($a&(1<<$x))==0){print $lo}else{print $hi}}
print $pr;$a++}}' 0 | cat knock.octal - | dd bs=84 of=/dev/ttyUSB0


The arrangement of shifted bits that I suggest (descending data bits followed by ascending address bits) is intended to minimize crossed wires between the shift registers and a JEDEC EPROM. Regardless, I strongly recommend a shift register arrangement which is upwardly compatible with 16 bit data and addressing beyond 16 bits. This would avoid some of the unintentional comedy of the old EEPROM programming discussion while also providing a mechanism to re-program a Gigatron (with 16 bit program segment) or Commander X16 (with more than 16 bit addresses).

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PostPosted: Fri Nov 12, 2021 3:42 am 
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Sheep64, are you over-trimming your hyperlinks? I'm having trouble here following your recent ones.

[Edit: Thanks, Ed ... I should've done a PM as well, so please feel free to delete this post and your reply.]

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Last edited by barrym95838 on Fri Nov 12, 2021 3:53 pm, edited 1 time in total.

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PostPosted: Fri Nov 12, 2021 11:07 am 
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(Sheep64 is mistakenly posting https links instead of http. I've sent him a PM.)


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PostPosted: Mon Nov 22, 2021 10:18 pm 
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I have not given up on the idea of ROM-less 6502-based EPROM programmer. I did give up the original concept of putting EPROM in location $0-$7FFF and RAM in $8000-$BFFF--it is just too difficult to write program with such memory map. Programming is hard without stack and Zero Page.

So this is another concept and modified pc board (schematic and board picture attached):
RAM $0-$7FFF
FT245 $8000-$FFFF in programming mode, $8000-$BFFF in normal mode
EPROM is writable shadow at $8000-$FFFF, $C000-$FFFF in normal mode

I have been waiting on 74ALS27 which came in yesterday. Hardware is now working, I can load program into RAM through FT245 and I can run it. Now I need to come up with software to program the shadow EPROM resides in $8000-$FFFF.
Bill


Attachments:
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PostPosted: Wed Nov 24, 2021 3:40 pm 
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I believe I have a working 6502-based EPROM programmer. This is the programming flow:
1. Switch to programming mode, load bootstrap (Prog65boot), then load the 4-function monitor (ProgMon), and load the SST39SF040 programmer (ProgSST). Run SST39SF040 programmer which erases EPROM from $C000-$FFFF then copies data from memory $4000-$7FFF to EPROM.
2. Switch to normal mode, and power up to run software of the newly programmed EPROM. Picture shows a basic 4-function monitor (load, display, modify, go) running on Prog65.

Some additional details:
RAM is from $0-$7FFF. Bootstrap loader and EPROM programmer are located in lower half of RAM. The upper half of RAM (16KB) contains the image to be programmed into EPROM. Different EPROM will require a different EPROM programmer software because they have different command sequence. Bootstrap and EPROM programmer are small software; bootstrap is 256 bytes and SST39SF040 programmer is 200 bytes. It only takes a few seconds to program 16KB.

A double-pole, double throw switch can simplify switching between programming and normal mode. The board only consume 30mA at 7.37MHz, so it can get its power from USB via FT245R. I'm getting rather fond of FT245R. It is really fast and an effective I/O device. It is somewhat expensive at $12, but offset the cost by replacing an I/O component resulting in a simple SBC consists of CPU, memory, and glue logic.

OK, I'll write up this design and release it to public domain. Normally I put my design files in retrobrewcomputers.org, but I also like to enter it in the document area of 6502.org. How do I access the 6502.org repository?
Bill

-------------
Edit, I'll send the design out to JLCPCB in a few weeks and get 10 pc boards fabricated. I'll have plenty of spare boards to give away. Let me know if you are interested. This should be a cheap and easy board to build; all through-hole components; W65C02 is the expensive part, but other CMOS 6502 should work; oscillator frequency can be anywhere 1MHz to 8MHz; RAM is any regular 128Kx8 RAM; EPROM is the inexpensive SST39SF0x0; and glue logic is the common 7427 and 7400.


Attachments:
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PostPosted: Wed Nov 24, 2021 9:02 pm 
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plasmo wrote:
Edit, I'll send the design out to JLCPCB in a few weeks and get 10 pc boards fabricated. I'll have plenty of spare boards to give away. Let me know if you are interested.


This might be better for PM but I decided to go public with it.

Bill, I am definitely interested! As a newbie, thank you for these efforts. I have been using the Raspberry Pi and a breadboard to get by, but something connecting through sinple USB would be SO much easier. Also, I did not know that this particular flash ROM even existed, and I would love to use that in my next-next project: much cheaper than the 28C256.

Thank you Bill, on behalf of newbies like me, great work.

Chad


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PostPosted: Wed Nov 24, 2021 10:54 pm 
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plasmo wrote:
I believe I have a working 6502-based EPROM programmer. This is the programming flow:

(1) Switch to programming mode.
(2) Load bootstrap (Prog65boot).
(3) Load the 4-function monitor (ProgMon).
(4) Load the SST39SF040 programmer (ProgSST).
(5) Run SST39SF040 programmer which erases EPROM from $C000-$FFFF then copies data from memory $4000-$7FFF to EPROM.

(?) Is there a step missing where you load something into RAM at $4000..$7FFF?
(?) What are you using to load the various components? A terminal program?

TIA... regards...


Last edited by Michael on Fri Dec 01, 2023 2:34 am, edited 2 times in total.

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PostPosted: Thu Nov 25, 2021 2:00 am 
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sburrow wrote:
Bill, I am definitely interested! As a newbie, thank you for these efforts. I have been using the Raspberry Pi and a breadboard to get by, but something connecting through sinple USB would be SO much easier. Also, I did not know that this particular flash ROM even existed, and I would love to use that in my next-next project: much cheaper than the 28C256.

Chad,
Since your newbie postings were the inspiration for the ROMless 6502-based programmer, I love to have your feedback. I'll definitely save a board for you.
$11 for AT28C256 is ridiculously expensive. $1.50 for SST39SF010 is more reasonable.

Michael wrote:
(?) Is there a step missing where you load something into RAM at $4000..$7FFF?
(?) What are you using to load the various components? A terminal program?

Michael,
In step 3, ProgMon is loaded into RAM from $7000 to $7FFF. The program is written for $F000-$FFFF, but when converting to Intel Hex, I specified origin of $7000 so it is loaded into RAM and later copied to EPROM at the targeted location. While 16K of RAM data from $4000-$7FFF is copied to EPROM, only $7000-$7FFF contain meaningful data.

I use TeraTerm in Windows to communicate with the hardware. In fact I used a TeraTerm macro file to load the 3 programs. The bootstrap, prog65boot.bin, is loaded as binary file; the other two are loaded as Intel Hex files.

sendfile 'c:\users\dad\desktop\dayfiles\6502\prog65\prog65boot.bin' 1
pause 1
sendfile 'c:\users\dad\desktop\dayfiles\6502\prog65\progSST.hex' 0
pause 1
sendfile 'c:\users\dad\desktop\dayfiles\6502\prog65\progMon.hex' 0


Bill


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PostPosted: Fri Nov 26, 2021 12:26 pm 
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Wow! I'm impressed Bill. I didn't think this would bear fruit for a much longer time. Kudos.

I'll smoke my crow this weekend on the pellet grill. :mrgreen:

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PostPosted: Fri Nov 26, 2021 3:42 pm 
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BillO wrote:
Wow! I'm impressed Bill. I didn't think this would bear fruit for a much longer time. Kudos.

Thank you, I created a page for Prog65 here: https://www.retrobrewcomputers.org/doku ... 502:prog65


Quote:
I'll smoke my crow this weekend on the pellet grill. :mrgreen:

You are in good company, I had eaten lots of crows in my career. Kinda surprised that crows are not endangered with me around. :P
Bill


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PostPosted: Sat Nov 27, 2021 12:20 am 
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Bill, forgive me for all the questions... If a user simply needs a Flash ROM programmer, is there a way he could easily write something like Daryl Rictor's 32K SBCOS image to a Flash ROM chip with your device?

TIA...


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PostPosted: Sat Nov 27, 2021 1:18 am 
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I look at SBCOS (a very nice monitor, I may add), but it is 17K in size ($BC00-$FFFF). It is 1K bigger than the EPROM space available on Prog65. SBCOS does have EhBASIC and XMODEM and I see some unused space, so it may be possible to trim it down to 16K without the XMODEM function. As long as the EPROM usage is 16K or less, the existing programmer can certainly program it. A SST39SF010 is 128K so it can have four 32KB images selectable via jumpers. Four jumper-selectable images are something I want to include in the pc board design. I'll read Daryl's copyright notice to see if I can modify SBCOS for Prog65.
Bill


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PostPosted: Sat Nov 27, 2021 5:16 am 
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Not trying to diss' your project because it is a very interesting solution and nifty accomplishment, but, oh my goodness, isn't 16K a pretty serious limitation for a useful programmer? Sure, you could add more jumpers and break a 32K or 64K image into parts but the hardware and the programming process is already convoluted compared to a microcontroller based solution, which, BTW, would be less expensive and easier to use.


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