As a sideline of my explorations of a better 6502 accelerator, I have been wondering whether it makes sense to try and develop a successor to the venerable GODIL board: a plug-in board in 40 and/or 48-pin DIP format with a smallish FPGA, bi-directional 5V level converters on all pins, and jumpers to make any pin a +5V or GND pin.

I would like to limit the size to the actual DIP format, smaller than the original GODIL. And I would like to make it easier and cheaper to build than my 65F02 accelerator, ideally limiting SMD assembly to the top side of the PCB only. Hence I am looking at small, low-cost FPGAs which would be aimed at reproducing rather than accelerating old logic chips. I am currently tending towards

• iCE40HX FPGA (or maybe Intel Max10 for a bit more power),
• NXB0108 level converters (5 * 8 bit -- no pullups, auto-sensing),
• micro USB for programming and optionally for use by the user design, TinyFPGA style,
• solder pad jumpers for +5V/GND (on the bottom of the PCB, to keep the footprint small).

Would this be of interest? I am not quite sure whether there are enough meaningful use cases. Which vintage 40-pin DIP ICs are really unobtainable/expensive enough to justify a replica implementation? (The populated board would probably end up costing $30 to $50 in smallish numbers.) In-circuit emulators/testers which use the USB port to control tests and report on results might be another application -- but again a rather niche one?

And a separate question: Has anyone used the NXB0108 level converters? By necessity they drive their outputs with a weakish DC strength, since the outputs may be "overruled" by the connected logic when they turn to inputs. There is boost circuitry to make transitions fast, even with capacitive loads connected, but pullup/pulldown resistors on the outputs are bad unless > 50 kOhm. How big of a limitation is that going to be in practice?

Thanks for your thoughts!
Juergen

I think it's a very good idea! I like the ICE40 parts because there is a good efficient open source toolchain for them.

GODIL had a very flexible pin assignment: the variable location of power pins in different sockets is a bit of a stumbling block for a near-universal offering. Your idea of solder pad jumpers (0R resistors??) sounds flexible and compact!

GODIL's passive level converters also caused a little interoperability trouble here and there, when the host circuit already contains pullups or pulldowns.

Your feature list looks good to me.

As for use-cases, see also hoglet's ICE family of designs
https://github.com/hoglet67/AtomBusMon/wiki/ICE-T65

The on-chip RAM of an LX9 is very handy, and I think the ICE40 is less well equipped. You might have seen OHO's other in-socket product, the GOP, which has an SRAM onboard. That was handy for some purposes.
http://www.oho-elektronik.de/index.php?c=1&s=product1

A replacement/upgrade to the GODIL would be very well received I think.

My concern with the ICE40-HX8K devices is they are actually pretty small, possibly smaller even than the XC3S500E part used on the original GODIL. The ICE40-HX8K has 7,680 LUTs and 128K bits of block RAM. The XC3S500E has 9,312 LUTs and 360K bits of block RAM.

It seems a shame to go to all the trouble of designing a replacement that is more space constrained.

If you prefer the Lattice parts (because of the open source tool chain) then it might be worth considering the newer ECP5 family.

The smallest part in this family has 12K LUTs and 576K bits of block RAM:


I don't know where the ECP5 parts sit price-wise, and I imagine they (like most FPGA) are currently being impacted by the global semiconductor shortage.

The Xilinx 7-series parts are also pretty good.

Dave

(I should update my brain - ECP5 is a good idea!)

Great suggestions, Ed and Dave! Especially since you mentioned exactly those FPGAs which I have also been pondering.

The package is an important constraint for me. It needs to fit between the DIP pin rows, i.e. can't be wider than 13 mm. A BGA seems unavoidable, but 0.8 mm pitch (maybe 0.65 mm?) is the smallest that can be used with the design rules of the low-cost PCB houses.

iCE40HX is particularly attractive in that respect. Available in a 9*9 mm² 121-ball BGA, where the power capacitors could still fit beside the BGA on the top side. It also requires only two supply voltages at modest current, hence small linear regulators would do. The only FPGA where I would hope to get by with a PCB populated on the top side only. But maybe a bit small and slow; it would definitely be a step down from the original GODIL.

ECP5 is unfortunately the worst from a package perspective. The only package that would fit is a 0.5 mm pitch 285-ball BGA. I have looked at the (incomplete) layout for the TinyFPGA EX -- it uses 6 layers, vias-in-pad, and blind buried vias. The message I get is "don't try this at home".

Max10 is available in a neat 10*10 mm² 169-ball BGA with 0.8 mm pitch. (In its smaller versions, up to the 10M16 with 549 kbit of block RAM.) Medium price and certainly better performance than the iCE40HX. But I have not seen these used much in amateur projects and can't quite place them performance-wise -- how do they compare e.g. to the Spartan-3?

Spartan-7 is what I had originally started to look at for my "new and improved 65F02". With three supply voltages, one of them drawing enough current to justify a switching regulator, and a 13*13 mm² package it definitely needs a PCB populated on both sides. But that's probably true for anything above the iCE40, so I might bite the bullet. Also, the fast XC7S25-2 which I had considered for the 65F02 is not cheap -- nearly 50 Euros incl. VAT. But smaller and slower versions start at 18 Euros or so.

So maybe the Spartan-7 (on a PCB populated on both sides) is it? It would kill two birds with one stone, being powerful enough for a 65F02-style accelerator -- although maybe a bit complex and expensive for a pure GODIL? I will play with component placement a bit to see whether I can fit everything, including the rows of 5V and GND jumper pads, onto the small PCB.

The original GODILs are a bit larger than a 40-pin DIP package.

They use a surface mount Preci-DIP header:
https://www.digikey.co.uk/en/products/d ... 61/3757324

Using this type of header might just allow you to use a larger device on the top side, such as the ECP5:
- 256 caBGA
- (14 mm × 14 mm, 0.8 mm)

Dave

In some of the applications I have in mind -- e.g. accelerating old chess computers -- space can be very constrained, both laterally and with respect to height. So I would prefer to stay within the DIP socket's footprint, and ideally not add height beyond a regular IC.

(With the 65F02 the latter requires the use of individual pins without a plastic strip, but it works out. Adding a micro USB jack on top might add a bit of height though.)

Just for what it's worth I made some kind of replacement for the GoDIL for my own projects:

MockA65xx

It's using a MAX10 FPGA and in order to save some space I'm using a TagConnect Adapter to program the device.

Power supply can be configured via solder bridges but it's also possible to supply power via JTAG connector.

Thank you for sharing! And you are using the MAX10, which I found tempting but had not seen in hobbyist use. Are you happy with the chip and with the development tools?

Your level converter solution is closer to the original GODIL, with pullups on every pin. The NXB0108 level converters which I am inclined to use are more elegant, but I am not sure how widely compatible they would be with host systems which may have their own pullup resistors on some signals. Which value did you use for your resistor arrays, and what has been your experience regarding compatibility of the signal levels with different hosts?

Anyway, what you have there looks pretty close to what I was planning to design. Not sure whether I should even bother? The one addition I had in mind was a USB interface, both for programming the FPGA (TinyFPGA style) and to potentially use the board as an in-circuit emulator/tester for various CPUs.

Oh, one more question: Where did you have the boards assembled? (Or did you hand-build them?) Thanks!

Yes... I'm quite happy with the MAX10 as it's easy to use with the builtin flash: No external components necessary (except
the power supply and caps off course).

The Quartus IDE is certainly not the best IDE but IMHO a lot better than the Lattice stuff...

The pullups in my design could (will?) be removed in the hopefully next/last revision as they are not necessary.
I'm using 4.7k or 5k IIRC... So far I never had a problem but I know that a there was a problem with Z80
in some Sinclair machine due to the pullups used on GoDIL

When I stated the project 2018 I was also contemplating to use the NXB0108 but decided against it: I don't like that automatic
switching of directions. Seems to be a matter of taste?!

If you look carefully at the schematics: The 10pin JTAG connector has some additional lines which I wanted to use
for primitive UART connection - but which could be used for USB too.
I did the design in order to be able to implement as many 6502 variants as possible (therefore the name: Mock a 65xx).

See attachment and here:

https://hackaday.io/project/165624-mock ... eplacement

But of course the design isn't limited to 6502....

The boards were produced by Elecrow.

Sorry... I accidentially attached an old version of the schematics. Here's the last version:

In my understanding the pullup resistors are only required when you want to use the MockA65xx (or the GODIL, for that matter) in CMOS-based host computers which have their switching threshold at 2.5V. In those environments the 3.xV high output level of the '3861 chips is probably marginal, but in bipolar TTL it should be perfectly fine?

I should probably get some NXB0108 and play with them; can't quite figure out what behaviour to expect when they are faced with a pullup resistor on the host side. I'm afraid it might derail the direction switching altogether? I do like the little leadless packages they come in. If only they were available without a 50€ minimum order at Mouser...

If you are considering adding USB, I can recommend a look at the TinyFPGAs and their TinyProg programming solution. It implements a USB-to-SPI bridge in the FPGA, via a boot loader which always stays in flash ROM as the first configuration. Then the user can upload a secondary image to the second half of the ROM. Luke Valenty has made the FPGA implementation and the PC-based programming software (in Python) available as open source. I have adopted this for the 65F02 and am quite pleased with it; users can update their boards in the field without requiring a programmer.