65c51 or 6551 ACIA microcontroller or SoC Emulators?

[Jmstein7]

BigEd wrote:

> ...someone already having done the work of building a 6502 bus interface for the Pico...

Maybe Dominic's project?
https://github.com/dp111/PicoTube

Nice!

[Jmstein7]

If you want to see what I'm working on, I have the repository here:
https://github.com/jmstein7/65c02-FPGA-with-Acia

Quote:

This repository contains HDL for a Xilinx Cmod A7 32T FPGA, which has onboard SRAM. The FPGA is connected to a WDC65c02 (see the XDC file). The ROM (rom_mon.coe) has a simple monitor. There is a 65c51 ACIA emulated. However, I cannot get the RX to work.

The ACIA Clock input is an external oscillator that runs at 1.8432 The Clock input is an external oscillator that runs up to 6mhz.

The ACIA used here is actually written by another member here, LIV2 (Matt Harlum). Maybe Matt can figure out why RX won't work?

Jon

[Jmstein7]

jmthompson wrote:

I had originally put this on the backburner since I didn't think there'd be any interest outside of me using this to make cheap SSC clones, but I had never considered the use case of people wanting to put ACIAs in 3.3V systems.

I've got some free time this weekend, and already picked up two picos a while back, so I can start messing around with this. I'm positive I saw a post a while back about someone already having done the work of building a 6502 bus interface for the Pico, so really all that will be needed here is to implement the ACIA itself as a wrapper around the Pico's built-in UART.

Well, put it back on the front-burner! It's a very useful project (if it works). There are no ACIAs for 3.3v.

Jon

[fachat]

Jmstein7 wrote:

I'm wondering if anyone knows of any microcontroller (PIC18F or 16F, Arduino, ESP32, Teensy, etc.) projects out there that can emulate a 65c51 or 6551 ACIA? I'm doing projects at 3.3v, so my standard WDC 65c51s won't work (5V only).

I've searched, but I'm not turning up anything that fits the bill, e.g., one of the projects I found for teensy requires all the Address lines(?). That's not going to happen. Control signals, Data Lines, and register select, i.e. That's all I can do.

Thanks!

Jon

Frankly I wouldn't look at the ACIA. I believe it has been designed with a modem being on the other end, so rts/cts handshaking is useless eg for null modem connections. Also it has no FIFO to reduce the risk of loosing characters.

I'd either look at a UART or, if you endeavor something original, writing a kind of 'fixed' ACIA with good handshaking and FIFO.

André

[Jmstein7]

fachat wrote:

Jmstein7 wrote:

I'm wondering if anyone knows of any microcontroller (PIC18F or 16F, Arduino, ESP32, Teensy, etc.) projects out there that can emulate a 65c51 or 6551 ACIA? I'm doing projects at 3.3v, so my standard WDC 65c51s won't work (5V only).

I've searched, but I'm not turning up anything that fits the bill, e.g., one of the projects I found for teensy requires all the Address lines(?). That's not going to happen. Control signals, Data Lines, and register select, i.e. That's all I can do.

Thanks!

Jon

Frankly I wouldn't look at the ACIA. I believe it has been designed with a modem being on the other end, so rts/cts handshaking is useless eg for null modem connections. Also it has no FIFO to reduce the risk of loosing characters.

I'd either look at a UART or, if you endeavor something original, writing a kind of 'fixed' ACIA with good handshaking and FIFO.

André

But, André, what about for people who already have the ACIA written into a substantial portion of their code? Doesn't it make more sense to avoid throwing out the baby with the bathwater? At the very least, should it not be register-compatible?

Jon

PS Like so many others here, I love your work!

[fachat]

Jmstein7 wrote:

fachat wrote:

Jmstein7 wrote:

I'm wondering if anyone knows of any microcontroller (PIC18F or 16F, Arduino, ESP32, Teensy, etc.) projects out there that can emulate a 65c51 or 6551 ACIA? I'm doing projects at 3.3v, so my standard WDC 65c51s won't work (5V only).

I've searched, but I'm not turning up anything that fits the bill, e.g., one of the projects I found for teensy requires all the Address lines(?). That's not going to happen. Control signals, Data Lines, and register select, i.e. That's all I can do.

Thanks!

Jon

Frankly I wouldn't look at the ACIA. I believe it has been designed with a modem being on the other end, so rts/cts handshaking is useless eg for null modem connections. Also it has no FIFO to reduce the risk of loosing characters.

I'd either look at a UART or, if you endeavor something original, writing a kind of 'fixed' ACIA with good handshaking and FIFO.

André

But, André, what about for people who already have the ACIA written into a substantial portion of their code? Doesn't it make more sense to avoid throwing out the baby with the bathwater? At the very least, should it not be register-compatible?

Absolutely. I probably missed that this is replicating an existing design.

In that case I'd go for a 'fixed' or even improved ACIA.

Quote:

PS Like so many others here, I love your work!

Many thanks! Great to hear!
André

[Jmstein7]

fachat wrote:

Many thanks! Great to hear!
André

You bet! One day, I would love to implement your OS (GeckOS) in a design!

Jonathan

[plasmo]

The basic ACIA function is not complicated. Since I use CPLD in my 6502 and Z80 designs, I generally put a basic ACIA in a 64-macrocell CPLD and still have logic resources left for a small bootstrap ROM and address decodes.

Maybe people are interested in a "65ACIA" where an ACIA fits in ATF1504 and have logic leftover for RAM/ROM/IO decode?
Bill

[Michael]

plasmo wrote:

Maybe people are interested in a "65ACIA" where an ACIA fits in ATF1504 and have logic leftover for RAM/ROM/IO decode?

Could you put a simple "6550 ACIA" in a 22V10, please?

[plasmo]

Michael wrote:

plasmo wrote:

Maybe people are interested in a "65ACIA" where an ACIA fits in ATF1504 and have logic leftover for RAM/ROM/IO decode?

Could you put a simple "6550 ACIA" in a 22V10, please?

22V10 only has 10 flip flops; a basic ACIA needs about 40 or so flip flops so hardware ACIA won't fit in a 22V10. However, it may be possible to do bit-bang serial port with a 22V10. A 22V10 plus a shift register may be enough to implement a bare-bone hardware serial receiver and software bit-bang serial transmitter.
Bill

[LIV2]

plasmo wrote:

The basic ACIA function is not complicated. Since I use CPLD in my 6502 and Z80 designs, I generally put a basic ACIA in a 64-macrocell CPLD and still have logic resources left for a small bootstrap ROM and address decodes.

Maybe people are interested in a "65ACIA" where an ACIA fits in ATF1504 and have logic leftover for RAM/ROM/IO decode?
Bill

Would love to see this, even stripped down my 6551 takes ~80 macrocells

[jmthompson]

LIV2 wrote:

plasmo wrote:

The basic ACIA function is not complicated. Since I use CPLD in my 6502 and Z80 designs, I generally put a basic ACIA in a 64-macrocell CPLD and still have logic resources left for a small bootstrap ROM and address decodes.

Maybe people are interested in a "65ACIA" where an ACIA fits in ATF1504 and have logic leftover for RAM/ROM/IO decode?
Bill

Would love to see this, even stripped down my 6551 takes ~80 macrocells

This is the direction I've been thinking of going as well, rather than messing around with a Pico. I am hoping to jam it into a 1504, but if that's too tight there's also the possibility of using a 72 MC XC9572XL (3.3V, but 5V tolerant). The only downside to the 9572XL is that it isn't available in PLCC-44 anymore, but the TQFP-44 isn't too hard to solder; I have two here I mounted on DIP-44 adapters for a previous project. In fact it might even be possible to jam one onto a pin-compatible DIP-28 adapter. If the RS-232 level converter chips are OK with 3.3V it should even work as a drop-in replacement on existing boards.

[plasmo]

I design in schematic to maximize CPLD resource utilization. Attached is the current schematic of CRC65 CPLD which is EPM7064S, a 64-macrocell CPLD available in PLCC44 package. In this design it contains

• 64-byte boot ROM
  Double-buffered serial receiver at 115200 N81
  Software bit-bang transmitter operating at 115200 N81
  Compact Flash interface
  I2C interface, bit-bang
  RAM decode

Bill