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PostPosted: Thu Aug 19, 2021 8:51 pm 
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Hey, all.

Without getting into the practicality of such a thing, if I had two 65c02s joined together (don't worry about how) what information or data would I need to transfer from Processor ONE to Processor TWO to put Processor TWO in the same state as Processor ONE? Program Counter, Status Flags, and the contents of the Stack? And, does anyone know how that could or would be done?

Thanks in advance for any help you guys can render.

-Jon


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PostPosted: Fri Aug 20, 2021 8:30 am 
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If you mean the programmer-visible on-chip state, you need the registers: A, X, Y, S, P, PC.

The contents of the stack are part of the contents of memory. If you want two processors to stay in sync they need to be executing the same program, seeing the same data, and the same interrupts at exactly the same times. The memory image they see would need to be the same, and that includes the stack.

As to how to set up A, X, Y, S, P and PC, you can only do it by executing code, so you'd need a way to execute a little more than half a dozen instructions.

If the two processors actually have different memories and peripherals, you need to get those into the same state too.

It would all make a lot more sense if you could say what you're thinking of doing, and a sketch of how you're thinking of doing it.

And some people will be wondering why you're doing it, so that might be worth a few words too!


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PostPosted: Fri Aug 20, 2021 8:35 pm 
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The scenario somehow reminds me of a system I read about that needed a fall-back option if an instruction was aborted, because it wasn't possible to recover enough state to restart the aborted instruction. One processor tagged along slightly behind the other, but the exact details elude my fading memory.

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Got a kilobyte lying fallow in your 65xx's memory map? Sprinkle some VTL02C on it and see how it grows on you!

Mike B. (about me) (learning how to github)


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PostPosted: Fri Aug 20, 2021 8:45 pm 
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Sun3 with 68000s?

(Edit: no, it was the other one, and earlier (of course): Apollo)


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PostPosted: Sat Aug 21, 2021 1:23 am 
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Yes, that must be it. Early 68000. The article states that the backup processor handled page faults while the main one was put on hold, but I thought it was different in that either could "take the lead", so to speak. No "DTACK grounded" there. The 68010 was apparently able to handle the situation unassisted, by stacking sufficient internal state.

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Got a kilobyte lying fallow in your 65xx's memory map? Sprinkle some VTL02C on it and see how it grows on you!

Mike B. (about me) (learning how to github)


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