Hi, All.

So, i've been trying to implement a DMA controller using PIC microcontrollers. Anyway, while doing unrelated reading, I came across an article on Hackaday (https://hackaday.com/2021/08/05/raspberry-pi-pico-used-as-a-transputer/) about using Pi Picos to control four-way, high-speed communications in an emulated "Transputer" set-up. Apparently, the PIO is quite fast and flexible. Which lead me to wonder whether one might be able to implement a DMA controller using the Pi Pico?

Hoglet (Dave) has already explored the bones of this issue, i.e., interfacing the PIO with the 65c02 bus: https://github.com/hoglet67/pico_bus6502

Of course, there is the matter of voltage - the Pico is a 3.3v tolerant device.

Anyway, just putting it out there. Thoughts? Is this workable? If so, what would the mechanics look like? Hardware setup? Software setup?

Regards,

Jon

PS There is also the possibility of using the FlexIO on a Teensy 4.0 or 4.1, but I can't seem to find much documentation on that.

Are you thinking of the DMA model where the 65C02 continues running during the DMA transfer?

Not any particular mode, though I saw some discussion here about cycle-stealing. But, no, in any DMA mode, whatsoever.

Jon

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Got it.

I don’t see any threads on using a Pico, yet, to do this. What do you think?

Jon

You have just under half a clock cycle to Tristate the 6502 (BE pin on the WDC ones), output an address + data + strobes to the RAM (write) or just address + strobe for read.

This is a "solved" problem in that reading at least is how it was done for video on the Apple II and many others at the time, so the question is; is the Pico fast enough to do this transaction using its PIO engines? You have under 0.5µS per transaction at 1Mhz...

-Gordon

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Gordon Henderson.
See my Ruby 6502 and 65816 SBC projects here: https://projects.drogon.net/ruby/

It's hard to offer advice here without a few more constraints, or a better understanding of your motivations and/or end goals.

If you run the 6502 slow enough, it might well be possible to implement a DMA engine using a Pico (using the PIO state machines and/or one of the ARM cores). Especially as the Pico is readily overclockable to in excess of 250MHz.

The biggest constraint might be the limited pin count on the Pico - it has only 26 general purpose I/O. A 6502 DMA engine would typically need a few more than this (PHI2, A15..0, D7..0, RnW, Rdy, BE is 28).

However, it all depends on what your end goal is.

For example, a 65C02 running at 25MHz with no DMA engine will almost certainly out perform a 65C02 running at 2MHz with a Pico-based DMA engine.

If your goal is to create a test-bed that allows you to experiment with different DMA engine designs, you would almost certainly be better off creating a 3.3V only system that conprised a W65C02, a small FPGA and 16-bit wide fast static RAM.

That's probably the approach I would take.

But like I say, it really all depends on what you want to achieve.

Dave

Dave,

That's precisely what I'm after - a generalized test platform for trying out and optimizing different, varied designs.

Jon