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PostPosted: Wed Mar 24, 2021 1:44 am 
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After a long wait for parts the final part arrived for my Rockwell R65F11 based board. I managed to buy two R65F11 chips a while ago, and more recently also got a R65FR1P ROM to match. I'd held off on the R65FR1 as it was way overpriced, but in the end I couldn't resist.

So this is my second PCB design, and I'm very pleased to say that it works with no patch wires (much better than the last one), although it is a very simple design. I used a CPLD for the small amount of Boolean logic required, and also for the address demultiplexing that was required. This worked well and saved a few chips. I wanted the IO range to decode to $0100, which is where the FORTH ROM expects a floppy controller, and this would have been a lot harder without the CPLD. The CPLD is very under-utilised, I probably should have exposed some pins so I could have added something like SPI, but it's too late for that now.

The CPLD really was easy to use, I'll be using them again in future projects. I designed the board with an ATF1508AS, but in the end used an EPM7064. They are pin compatible so no hardware changes were required. The advantage for me was that it is programmable from linux, having to use Windows would have added a lot of steps to programming, so this worked out really well.

The Rockwell FORTH has a bank switching scheme built in, using Port B on the microcontroller. The 65F11 only has a 16k address range, but I used the bank switching to make the entire 128k FLASH chip available indirectly.

Current project: learning FORTH. I plan on writing a FLASH programmer as my first real program, not sure what I'll do after that.

I do plan on writing up the details and publishing the schematic. I've also got some spare boards if anyone else would like to build one, but finding the 65F11 might be too difficult, it is a lot easier to use a R6501Q and program your own kernel.


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PostPosted: Wed Mar 24, 2021 9:11 am 
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Joined: Thu Dec 11, 2008 1:28 pm
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Location: England
Looking very good!

Quite an interesting idea to put I/O at the bottom of page 1 - so long as there's not too much I/O, that's practical, and it does leave pretty much all of memory space clear.


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PostPosted: Wed Mar 24, 2021 8:17 pm 
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BigEd wrote:
Quite an interesting idea to put I/O at the bottom of page 1 - so long as there's not too much I/O, that's practical, and it does leave pretty much all of memory space clear.

I think the floppy controller is only a few bytes, so with sufficient address decode you probably wouldn't miss that. These older Rockwell microcontrollers used to cram a lot into limited address space. The on-chip I/O is in Page 0, and on the 6500/1 the stack was also moved to Page 0. This had the advantage that with a masked ROM system you could get away with only one chip in total, and no external bus required (if the on-board RAM was sufficient).

At the other end of the scale, I put a 39SF040 512k x 8 FLASH chip into the ZIF socket last night and successfully programmed it, that's an extreme amount of storage. I have the banking set up to bank the upper 8k address range only, as the on-chip RAM and I/O does not get banked, so if you use the lower 8k for banking you lose a small amount in each bank. That would have been a problem with the FLASH as you need particular addresses for programming. This makes the address translation a little complicated.

To program $CA into address 0000 I used these FORTH commands:

Code:
AA 3555 2 BANKC! OK
55 2AAA 1 BANKC! OK
A0 3555 2 BANKC! OK
CA 2000 0 BANKC! OK


BANKC! is a banked version of ! (write byte to memory), the C means byte rather than word. The addresses need to be translated into the bank window, so 3555 in bank 2 is address 5555 and 2AAA in bank 1 is 2AAA (which looks strange but is actually correct because of the bank window starting at 2000).

Next step is learning to create my own FORTH words for programming the FLASH.


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