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IDE Data format puzzle

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plasmo

Post subject: Re: IDE Data format puzzle

Posted: Thu Jan 21, 2021 12:17 pm

Joined: Fri Dec 21, 2018 1:05 am
Posts: 1121
Location: Albuquerque NM USA

floobydust wrote:

Hope you don't mind, but I took your code and changed it a bit.... it's shorter and will execute a bit quicker. I didn't see the hexout routine used, but I shortened that a bit too.

Thank you! I'm a 6502 newbie, have just decided to use W65C02 instruction set since CRC65 at 14.7MHz will always be W65C02. In fact, just yesterday I've learned from your code example about W65C02's Indirect addressing (LDA (zp)) without the y index. Very cool. I think I'll post my code on newbie page for (hopefully constructive) criticism.

I do have my hangups...I never did like replacing:
JSR x
JSR y
RTS

with

JSR x
JMP y.

It just seems ... wrong. Another one I don't like is replacing
AND #1
BEQ z

with

ROR
BCC z.

I've used these equivalents on Z80 when I'm desperate for space or speed, but have always commented to remind myself how much I really don't like it.

Bill

Edit, Z80 has instructions for "return from subroutine based on conditional code". Very powerful instructions--once I got over the nausea!

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floobydust

Post subject: Re: IDE Data format puzzle

Posted: Thu Jan 21, 2021 12:54 pm

Joined: Tue Mar 05, 2013 4:31 am
Posts: 1385

Yes, I only use the newer instruction set for the W65C02. I think everyone has their own "pet peeves" with this stuff.

One I've never liked is using the BIT instruction to skip over a one or two byte instruction. This is done by defining a single byte ahead of the instruction you want to skip over. It does save a byte of space, but I don't like it.

Other things to consider is the shift instructions... ASL and LSR. These differ from the ROL and ROR instructions as the carry bit doesn't get rotated into a bit position of the source.

I also like using the Rockwell extensions (also in the WDC W65C02) for single bit manipulations in Page Zero, like SMBx and RMBx along with their branch counterparts, BBSx, BBRx.

Another nice enhancement is for the JMP instruction, now with indexing as JMP (ADDR,X).

There are some well known books that are handy for the 65C02 (and 65C816) which can be downloaded in PDF:

1- Programming the 65816 - By David Eyes and Ron Lichty (includes the 6502, 65C02)
2- 6502 Assembly Language Subroutines - By Lance Leventhal and Winthrop Saville

I'm certain you'll get some very good constructive feedback on any code you post... I do the same from time to time... and I get good feedback!

_________________
Regards, KM
https://github.com/floobydust

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BigDumbDinosaur

Post subject: Re: IDE Data format puzzle

Posted: Thu Jan 21, 2021 3:49 pm

Joined: Thu May 28, 2009 9:46 pm
Posts: 8514
Location: Midwestern USA

plasmo wrote:

I do have my hangups...I never did like replacing:

Code:

JSR x
 JSR y
 RTS

with

Code:

JSR x
 JMP y.

It just seems ... wrong.

In assembly language, nothing is "wrong" as long as the program does what is expected and doesn't do what isn't expected. Making that last instruction a jump instead of a subroutine call exchanges the combined execution time of a JSR (6 cycles) and an RTS (6 cycles) with the execution time of a JMP (3 cycles). What's "wrong" with that?

Incidentally, your code will be easier to read in your posts if you use the code tags.

_________________
x86? We ain't got no x86. We don't NEED no stinking x86!

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BigEd

Post subject: Re: IDE Data format puzzle

Posted: Thu Jan 21, 2021 4:17 pm

Joined: Thu Dec 11, 2008 1:28 pm
Posts: 10986
Location: England

We might say it's unexpected to the uninitiated: I might recommend a comment

Code:

JMP somewhere ; tail call, we're done

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plasmo

Post subject: Re: IDE Data format puzzle

Posted: Thu Jan 21, 2021 4:55 pm

Joined: Fri Dec 21, 2018 1:05 am
Posts: 1121
Location: Albuquerque NM USA

My comment generally read like this:

Code:

JSR x
JMP y
;JSR y
;RTS

Yep, it is a personal problem, no cure.

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BigDumbDinosaur

Post subject: Re: IDE Data format puzzle

Posted: Thu Jan 21, 2021 5:25 pm

Joined: Thu May 28, 2009 9:46 pm
Posts: 8514
Location: Midwestern USA

BigEd wrote:

We might say it's unexpected to the uninitiated: I might recommend a comment

Code:

JMP somewhere ; tail call, we're done

Good point.

I'm a strong advocate of adequate commenting, with each comment describing the purpose of the instruction, not what it does. In code sections that are slightly arcane or non-obvious, I often precede the section with a comment block to explain the what-and-why of the code. For example:

Code:

04009  ;   ——————————————————————————————————————————————————————————————————————
04010  ;   The following code modifies the stack frame that was pushed by the ISR
04011  ;   preamble,  thus affecting the behavior of the foreground code that was
04012  ;   interrupted.  The changes are as follows:
04013  ;
04014  ;       Frame       MPU
04015  ;       Offset    Register   Data or operation
04016  ;       —-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—
04017  ;       irq_arx      .C      SCSI controller interrupt status
04018  ;       irq_xrx      .X      SCSI controller command status
04019  ;       irq_yrx      .Y      SCSI controller general status
04020  ;       irq_pcx      PC      SCSI foreground execution vector
04021  ;       irq_srx      SR      C & D cleared, m & x set
04022  ;       —-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—-—
04023  ;
04024  ;   No analysis of status is made here; the foreground sees to that.
04025  ;   ——————————————————————————————————————————————————————————————————————
04026  ;
04027  00D3D1  83 05                  sta irq_arx,s         ;.C = interrupt status
04028  00D3D3  8A                     txa
04029  00D3D4  83 03                  sta irq_xrx,s         ;.X = command status
04030  00D3D6  98                     tya
04031  00D3D7  83 01                  sta irq_yrx,s         ;.Y = general status
04032  00D3D9  AD 0A 01               lda ivscsi            ;get alternate driver vector
04033  00D3DC  D0 03                  bne .0000010          ;vector defined, so use it
04034  ;
04035  00D3DE  A9 07 D9               lda !#scsicmda        ;default if no alternate
04036  ;
04037  00D3E1  83 0B         .0000010 sta irq_pcx,s         ;reroute foreground code &...
04038  00D3E3  9C 0A 01               stz ivscsi            ;invalidate alternate vector
04039           shorta                ;8 bit .A
04040  00D3E6  E2 20                  sep #%00100000
04041  00D3E8  A3 0A                  lda irq_srx,s         ;get status register
04042  00D3EA  29 FE                  and #sr_bdm|sr_car_i  ;clear C & D flags
04043  00D3EC  09 30                  ora #sr_amw|sr_ixw    ;set m & x flags
04044  00D3EE  83 0A                  sta irq_srx,s         ;change stack copy
...

A bit of survival mode is at work here: I may not revisit this code for several years but when I do, I will immediately know by reading the comments what it was I was thinking at the time. Of course, I sometimes revisit code, read the instructions and comments, and think, "What in Sam Hill was I thinking when I wrote this mess?"

_________________
x86? We ain't got no x86. We don't NEED no stinking x86!

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BigDumbDinosaur

Post subject: Re: IDE Data format puzzle

Posted: Thu Jan 21, 2021 5:29 pm

Joined: Thu May 28, 2009 9:46 pm
Posts: 8514
Location: Midwestern USA

plasmo wrote:

My comment generally read like this:

Code:

JSR x
JMP y
;JSR y
;RTS

Yep, it is a personal problem, no cure.

BTW, if subroutine y is close enough, you could use BRA y and save a byte of code.

_________________
x86? We ain't got no x86. We don't NEED no stinking x86!

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plasmo

Post subject: Re: IDE Data format puzzle

Posted: Thu Jan 21, 2021 6:01 pm

Joined: Fri Dec 21, 2018 1:05 am
Posts: 1121
Location: Albuquerque NM USA

BigDumbDinosaur wrote:

... Of course, I sometimes revisit code, read the instructions and comments, and think, "What in Sam Hill was I thinking when I wrote this mess?"

A couple times in code design reviews I had blurted out "who wrote this crazy code?" only to have others politely pointed out it was I.

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GARTHWILSON

Post subject: Re: IDE Data format puzzle

Posted: Thu Jan 21, 2021 8:33 pm

Joined: Fri Aug 30, 2002 1:09 am
Posts: 8546
Location: Southern California

plasmo wrote:

floobydust wrote:

Hope you don't mind, but I took your code and changed it a bit.... it's shorter and will execute a bit quicker. I didn't see the hexout routine used, but I shortened that a bit too.

Code:

 JSR x
 JSR y
 RTS 

with

Code:

 JSR x
 JMP y 

It just seems ... wrong.

It saves a line, a byte, and nine cycles in 6502, and it's the right thing to do in any assembly language, usually. I say "usually" because there are situations where you may have parameters on the hardware stack that won't be at the right depth in the stack for the subroutine to find them if the return address isn't there on top as expected. This is discussed starting in chapter 6, "Parameter-passing methods," of the 6502 stacks treatise. A separate data stack in ZP solves this problem.

When I do the JMP thing above, I just put a comment out to the right saying, "JSR, RTS."

Quote:

Another one I don't like is replacing

Code:

  AND #1
  BEQ z 

with

Code:

 ROR
 BCC z  

65c02 also has BIT# (unlike the NMOS 6502), so you can test a bit in the accumulator and still keep the accumulator's value intact for later operations; ie, the test is non-destructive. I discuss the CMOS 65c02's many improvements over the NMOS 6502 at http://wilsonminesco.com/NMOS-CMOSdif/ .

Quote:

Edit, Z80 has instructions for "return from subroutine based on conditional code". Very powerful instructions--once I got over the nausea!

I use macros like RETURN_IF_EQ. This particular one would assemble a BNE to conditionally branch around an RTS. The 6502 only takes 2 cycles ("T-states" in Z80 lingo) if the branch is not taken, and usually three if it is taken.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

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