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Dan Moos
 Post subject: 65c22 question.
PostPosted: Sun Dec 13, 2020 7:01 pm 
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Joined: Sat Mar 11, 2017 1:56 am
Posts: 276
Location: Lynden, WA
If I have a particular interrupt disabled in the IER, will it still set the appropriate flag in the interrupt flag register?

Basically, I want the 6502 to be able to get the status of a handshake line (I want to know when the peripheral device signals DATA TAKEN). I don't want the 6502 to be interrupted for this. I just want to read the flag register.

This seems like it would be a common requirement. I'm not able to try this at the moment (I'm away from the hardware). Just curious if that's how it works.
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Chromatix
 Post subject: Re: 65c22 question.
PostPosted: Sun Dec 13, 2020 7:52 pm 
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Joined: Mon May 21, 2018 8:09 pm
Posts: 1462
Section 2.3:

When the Data Ready signal is received, it sets an internal flag in the Interrupt Flag Register (IFR). This flag may interrupt the microprocessor or it may be polled under program control.

This indicates to me that, in general, the IFR operates independently of the IER, and the latter simply acts as a mask between the IFR and the /IRQ output.
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Dan Moos
 Post subject: Re: 65c22 question.
PostPosted: Sun Dec 13, 2020 8:02 pm 
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Posts: 276
Location: Lynden, WA
I missed that line. Seems to perfectly describe what I need. Thanks!
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GARTHWILSON
 Post subject: Re: 65c22 question.
PostPosted: Sun Dec 13, 2020 8:03 pm 
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Joined: Fri Aug 30, 2002 1:09 am
Posts: 8546
Location: Southern California
Yes; from section 1.14 of the data sheet:
Quote:
If an Interrupt Flag is a Logic 1, and the corresponding Interrupt Enable bit is a Logic 1, the IRQB will go to a Logic 0.

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