Marta wrote:
Assuming the measurment shows a JSR (ABS,X) executed in bank 0, what is Your conclusion?
Based on the scope photo, I'm not sure which cyle is which. I would need to know, where does the instruction begin? (Which cycle is the opcode fetch?) Maybe we should wait until you can post a photo that also shows a second trace to act as a timing reference. EDIT: many scopes have a Z-Axis (intensity) input which can be very useful -- almost like having a
three channel scope.
Speaking more generally, troubleshooting can take two possible approaches. Both can be useful, and you may even wish to alternate.
One way is speculative. For example, you could try replacing the 'hct245 with '
ahct245, or try rerouting the clock signal for less propagation delay. I'm not saying you should -- I'm just inventing examples where you're acting on Best Practices and maybe a hunch -- not on specific evidence.
The other way is analytical, where you first try to
observe the problem in detail... then
later ask "why" you're seeing what you're seeing (so you can fix the problem).
Your scope traces are analytical, of course.
For these and for ALL your tests I encourage you to
simplify as much as possible. I can't
teach you this -- it's a philosophy!
-- but here's an example. For a scope trigger, you mentioned addressing one of the unused I/O-addresses in the instruction before. Instead, can't you trigger from the 816's /Vector Pull pin? Another option, usable in some circumstances, is to trigger from VDA or VPA, or from an address line which you know will toggle as a test loop executes.
Speaking of loops, this one is a simple as it gets -- just one instruction! In a previous
post I explained how to use pullup and pulldown resistors to ensure your machine executes an endless series of JSR(abs,X).
-- Jeff
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