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 Post subject: new 65C816 build
PostPosted: Mon Oct 19, 2020 4:17 pm 
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Hi there!

I've been nostalgic for my SYM-1, which I got out of mothballs earlier in the year. It was my first computer when I was a little boy! I never had the BASIC ROMs for it, so I'm going to burn them and try to get it running and connected to an RS-232 port on my computer. Perhaps I'll also make an expansion board for it ... maybe 48K RAM and 16K ROM, and I can use denser parts on the expansion board.

Anyway, now that I'm retired, I've been thinking about making my own computer from scratch. For now, I'm considering a 65C816, though I might breadboard a 6502-based machine to get started. I'm not yet done reading the 65C816 manuals (and I'm a bit surprised I have to pay for the programming manual!) but I've been wondering what strategies people have for building memory maps for the processor.

Seems like I can have a 64K stack in the zero bank, minus some interrupt vectors. What of the other banks? I've seen some posts which mimic ROM across the banks, and I guess that might be better for reducing long calls and jumps. There will also be some memory-mapped I/O, so do most designs decode that into a special bank, or map it into every bank?

Perhaps people with more experience can share what tradeoffs they've noticed with different designs.


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 Post subject: Re: new 65C816 build
PostPosted: Mon Oct 19, 2020 4:45 pm 
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First, Welcome!

As the programming manual, it was written and published many years, hence the copyright. I still have my paper version which I bought when it first came out. It's a great reference for the 6502, 65C02 and 65C816, but some years ago I found a PDF version on the net which I was able to download... which was before WDC had their version.

As for getting started, I'd be more inclined to leave the SYM-1 alone (I've got one as well)... as you can build a very small SBC which is much faster, has more RAM and ROM, and adequate I/O to get started and you don't need an erector set of parts and boards to connect to the SYM-1... but of course, that's just my $0.02.

One thing I will say is, get your parts from a current distributor, like Mouser. Buying parts off of Ebay has been a hit or miss (more miss than hit) for many folks and they usually end up here with posts looking for help trying to diagnose fake and/or rebranded parts. I agree that starting with the 6502 (specifically, the W65C02S) would be a good idea... you can get a simple system up and running on a breadboard within a day.

Parts to have on hand (in my view) would include:

W65C02S CPU
W65C22S VIA
32KB Static RAM
32KB Static EEPROM
some 74HC logic chips: 74HC00, 74HC30, 74HC138 at a minimum
1-, 2-, 4MHz oscillators
many 0.1uF bypass caps
some pushbutton switches
several 3.3K resistors
a few schottky diodes
either a DS1813 or TL7705B reset chip
a UART of some sort (W65C51 has the Xmit bug) NXP SCC2691 is (still available) is DIP and a good choice
a USB to Serial adapter (FTDI 232 type) so you can have a console to a PC with a terminal program
The usual wire, a breadboard, some LEDs, etc.
a solid reliable power supply... 5V regulated capable of a solid 3 amps... buy a good quality one!

There's always more you can add... but getting started does take some spending... but well worth it in the end. You'll also need some dev tools... to edit, assemble and link code... and some way to program the EEPROM. Good luck on getting started, and there's a ton of support out here!

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https://github.com/floobydust


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 Post subject: Re: new 65C816 build
PostPosted: Mon Oct 19, 2020 4:49 pm 
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Welcome!

It's a quite a big design space to explore - lots of possibilities.

I would recommend you start by building a 6502-style setup, even if you use a 65816 to do it. The '816 boots into a pretty accurate 6502 mode, and that's a simpler world to live in.

You will get various advice from various people - I would not expect a consensus. So you'll have to make a judgement.

That said, about your '816 choices and possibilities:

Assuming you don't get too clever with your glue logic, bank 0 will be used for the vectors, for direct page, and for the stack. Almost everyone will agree that an 8 bit stack pointer isn't a big limitation, so the possibility of a larger stack doesn't come up much. I can't remember seeing such a setup.

I would say the I/O would normally also be placed in bank 0, and only in bank 0. It feels right to me, and I think it's the usual choice, to make the higher banks all RAM and contiguous. If you break them up with things that appear in all banks, you have to treat RAM as lumpy. Smooth seems better to me.

It's possible to place the vectors somewhere else, by using VPB in your glue logic. I don't think I recommend it.

Because the vectors normally live in ROM, that pushes you towards having ROM at the top of bank 0, just like a 6502 system. Personally, I'd go with that, rather than fighting it, and I'd leave direct page and the stack in their usual places too. The more changes you make, the more you need to get your head around the implications, the more you need to document, and explain your choices to others. And maybe change software too.

With ROM at the top of bank 0, I'd also be inclined to put your MOS entry points there. You could choose to use the COP opcode, or even BRK or WDM, but I'm not sure I see any compelling advantages.

Good luck!


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 Post subject: Re: new 65C816 build
PostPosted: Mon Oct 19, 2020 7:25 pm 
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Ed and floobydust have made many good points above, and I won't repeat them. Be sure to go through the 6502 primer, which is about the many points of making your own computer. It's '02, not '816; but a lot of the same things apply anyway. I brings up and clarifies a lot of things you might not have thought of, and will hopefully prevent the mistakes and discouragement.

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The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?


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 Post subject: Re: new 65C816 build
PostPosted: Mon Oct 19, 2020 8:03 pm 
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mikeblas wrote:
Hi there!

I've been nostalgic for my SYM-1, which I got out of mothballs earlier in the year. It was my first computer when I was a little boy! I never had the BASIC ROMs for it, so I'm going to burn them and try to get it running and connected to an RS-232 port on my computer. Perhaps I'll also make an expansion board for it ... maybe 48K RAM and 16K ROM, and I can use denser parts on the expansion board.

Anyway, now that I'm retired, I've been thinking about making my own computer from scratch. For now, I'm considering a 65C816, though I might breadboard a 6502-based machine to get started. I'm not yet done reading the 65C816 manuals (and I'm a bit surprised I have to pay for the programming manual!) but I've been wondering what strategies people have for building memory maps for the processor.

Seems like I can have a 64K stack in the zero bank, minus some interrupt vectors. What of the other banks? I've seen some posts which mimic ROM across the banks, and I guess that might be better for reducing long calls and jumps. There will also be some memory-mapped I/O, so do most designs decode that into a special bank, or map it into every bank?

Perhaps people with more experience can share what tradeoffs they've noticed with different designs.


Similar what what Ed said; Ask 10 computer folks, get 11 replies ...

However, like you, I started on the 6502, but maybe a year or 3 later on an Apple II in '78 and recently decided to make my own - started on a breadboard with a WDC 65C02, went to stripboard, then PCB, then adapted that to take the 65C816, then made a dedicated '816 board with 512KB RAM (and Rev 2 can take 1MB).

As for memory map, etc. I've kept the 816 side virtually the same as my 6502 version - Direct page (Zero page in the 6502) is at $0000, stack is a simple 256 bytes at the same $0100 (I have no need for anything more in my applications), hardware is at $FE00 through $FEFF and hardware vectors, etc. are in $FFxx. My system is all RAM, no ROM though - I have a separate "host" processor (an ATmega) that helps me boot it and perform IO)

So my suggestion, based on that, is keep thing simple. You can (with a tiny bit of thought beforehand) make a board that will take either a 65C02 or the 65C816, but starting from scratch? Even if you might never use the '816 side of things, I'd have used the '816 from day 1.

As for '816 books, manuals... There are many freely available online. Just search for them.

Back to breadboard, there is an excellent set of videos (and kits, etc.) from Ben Eater with a 6502 from scratch type of system. Well worth a watch on Youtube.

Keep us informed!

Cheers,

-Gordon

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Gordon Henderson.
See my Ruby 6502 and 65816 SBC projects here: https://projects.drogon.net/ruby/


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 Post subject: Re: new 65C816 build
PostPosted: Mon Oct 19, 2020 11:02 pm 
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floobydust wrote:
As for getting started, I'd be more inclined to leave the SYM-1 alone (I've got one as well)... as you can build a very small SBC which is much faster, has more RAM and ROM, and adequate I/O to get started and you don't need an erector set of parts and boards to connect to the SYM-1... but of course, that's just my $0.02.

I've wanted to do a few things with the SYM since I've first owned it (when I was eight!) and it would be meaningful for me to get through those projects, even if only for sentimentality.

This isn't my first hardware project, though it's the first serious one in a while. I have buckets of parts, and I've been digging through them to clean out the true junk and obsolete stuff and building a list of what to buy. I found some ancient 4116 dynamic RAM parts, for example ... the kind that require -12, +12, and +5 -volt supplies. There are other things I don't have, tho ... like a modern device programmer. Buckets of passives, rails of TTL chips, and so on ... and I think my HP lab power supply should get me through! :)

floobydust wrote:
Parts to have on hand (in my view) would include:
a UART of some sort (W65C51 has the Xmit bug) NXP SCC2691 is (still available) is DIP and a good choice
What is the xmit bug?

drogon wrote:
However, like you, I started on the 6502, but maybe a year or 3 later on an Apple II in '78 and recently decided to make my own - started on a breadboard with a WDC 65C02, went to stripboard, then PCB, then adapted that to take the 65C816, then made a dedicated '816 board with 512KB RAM (and Rev 2 can take 1MB).
Cool! It sounds like we have similar paths / histories then. Have you written up your projects here or somewhere else? Can I read about them?

The SYM was my first. I had my fingers wet with TTL logic at the time, and it was just so awesome to be able to have software drive circuits I breadboarded. I had an AIM-65, then an Apple II, then an IBM PC 5150 ... and after all that, about 30 years in the software industry :) Maybe a part of the challenge for me will be separating the nostalgia from the interesting projects, but I think I've already acknolwedge that none of this will actually be useful.


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 Post subject: Re: new 65C816 build
PostPosted: Mon Oct 19, 2020 11:38 pm 
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mikeblas wrote:
What is the xmit bug?

Bit 4, "transmit data register empty," is stuck in the on position, such that it always looks like it's ready for another byte, so if you don't have enough delay between giving it new bytes to transmit, you'll get garbage out. Follow the forum discussion on it in this topic. They also have a bug in the even parity; but who uses parity? I have never had any trouble with Rockwell's or CMD's (formerly GTE's) 65c51's (ie, CMOS).

I think 6502.org forum member GaBuZoMeu has the best solution yet: Use the 51's pin 5 (if in DIP), the x16 clock, as an output to drive a VIA's PB6 for its T2 to count pulses and generate an interrupt. The T2 latch value does not need to change with Φ2 rate nor with baud rate.

(This is in the 6502 primer linked above.)

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?


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 Post subject: Re: new 65C816 build
PostPosted: Tue Oct 20, 2020 6:31 am 
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About memory maps, there are much to be said.
The first 64K are special and best to let them be RAM. I/O's are usually not intensively used, so no advantage with zp worth the intrusion into this precios RAM space, Some high bank is OK and easy to decode. Don't duplicate the addresses in many banks. Every address can be reached from any program location. There is a four byte absolute addressing mode. That also works from emulation mode.

PROM's are not nice to work with. Best to just have a small one with a loader and run the programs from RAM. One easy way is to put a fairly large SRAM as contigous memory covering the lower banks. Just have a PROM with a small primary boot loader that copies itself into RAM and then switches out the PROM. In primary boot mode let reads go into PROM and writes into RAM, Very easy to implement with a few gates. A DIP-switch on the top PROM addresses can be a good idea, alowing the same PROM to be used many times between erasures.

The WDC 6551 issue is mostly a non-issue for new designs. Interrupts for receive works fine. Transmit interrupts are usually not needed, there are other solutions available. For a beginner's loader, leave interrupts out. There are zero advantages, just problems. Use polled receive. There is also the option with software UART or paralell loading.

Unfortunately wire wrapping has become almost obsolete, but there still are sockets available. It's a wonderful technology for amateurs, as long as we can get sockets and DIL-chips. The design can grow chip by chip and be tested in between. With a good ground plane it usually always works. Changes are possibly and no problems with routing.

Good luck with Your project!


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 Post subject: Re: new 65C816 build
PostPosted: Tue Oct 20, 2020 6:53 am 
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Marta wrote:
About memory maps, there are much to be said.
The first 64K are special and best to let them be RAM. I/O's are usually not intensively used, so no advantage with zp worth the intrusion into this precious RAM space, Some high bank is OK and easy to decode. Don't duplicate the addresses in many banks. Every address can be reached from any program location. There is a four byte absolute addressing mode. That also works from emulation mode.

It depends on what you want to do with it. In my own applications, I/O is intensively used—not such that I would take DP/ZP space for it, but I would definitely try to work it so long addressing is seldom needed for I/O. The reason is that some "long" op codes are missing, most notoriously for BIT, TRB, TSB, INC, and DEC. The indirect and indexed longs have somewhat less application in I/O, so I don't see them as an issue.

Quote:
The WDC 6551 issue is mostly a non-issue for new designs. Interrupts for receive works fine. Transmit interrupts are usually not needed, there are other solutions available. For a beginner's loader, leave interrupts out. There are zero advantages, just problems. Use polled receive. There is also the option with software UART or parallel loading.

Note that the W65C51 bug is a problem even without using interrupts. If you poll the transmit-register-empty flag to see if you can send another byte yet, it will always say it's ready, even when it's not.

Quote:
Unfortunately wire wrapping has become almost obsolete, but there still are sockets available. It's a wonderful technology for amateurs, as long as we can get sockets and DIL-chips. The design can grow chip by chip and be tested in between. With a good ground plane it usually always works. Changes are possibly and no problems with routing.

I've had enough stock that I have not checked the market in many years. Maybe I should stock up again while I can! I do have some WW PLCC sockets I bought in the 1990's, and those are extra gone from the market, so I'll guard those with extra care.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?


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 Post subject: Re: new 65C816 build
PostPosted: Tue Oct 20, 2020 8:25 am 
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Oh, Marta's post presents a thought: indeed, even in 6502 mode the '816 can address the full 24 bit address space, and that space is so large that very lazy address decoding is possible, for example to put I/O all across 8 million addresses by using just one bit.

And if you put I/O in the high half of memory, you've not put holes into every bank: you still have 8Mbyte of consecutive non-I/O locations.

This doesn't help too much with ROM though: you pretty much need ROM in bank 0. However, you can dedicate a full 32k to ROM, knowing that the remaining 32k is enough for stack and direct page access for pretty much all practical purposes.

If you wanted memory-mapped video, that could take a 4M chunk of address, still leaving 4M for application purposes. (You could probably map the same memory more than once, allowing easier pixel access, or allowing for both bitplanes and chunky pixels.)

So, with a 24 bit address bus, incomplete decoding gives rise to possibilities.


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 Post subject: Re: new 65C816 build
PostPosted: Thu Oct 22, 2020 4:38 pm 
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Thanks for all the tips, everyone; and thanks for the welcome and encouragement too :)

There's more reading to do, but I think that I can lay-out memory mostly at will since the long-addressing instructions do exist. Once the zero-page, stack, and vector tables are in place, I'll try to keep everything lumped together so there aren't any holes or pockets and I have as much contiguous general-purpose RAM as possible.


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 Post subject: Re: new 65C816 build
PostPosted: Thu Oct 22, 2020 8:15 pm 
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For ideas on how to efficiently map a ROM temporarily into the high part of Bank 0 at boot time, as well as handling the '816 bus interface correctly, see this recent thread.


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