Stick it in the fridge or freezer as well. And you can hook it up to a variable power supply and see how it runs at lower or higher (but still in-spec) voltages. If you're feeling enthusiastic, try the extremes of voltage in combination with extremes of temperature.

Congratulations on this encouraging result! But you're certainly prudent to ask, how close to the edge I am?

When it comes to stress testing, we need to be cautious about what we consider a successful test. As timing margins get pushed tighter and tighter, the first failures to appear may be VERY subtle indeed. "Corner cases," yes, and some of the corners can be VERY obscure (though still potentially fatal).


Have a look at this thread, for example.


-- Jeff

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Thanks to those who gave stress test suggestions.
Recently I've been struggling to add an SC28L92 DUART to my computer. I've read and re-read the datasheet and BigDumbDinosaur's guides, but I can't seem to get it to work consistently. I keep getting occasional corrupted data. I think it may be a timing issue.
To troubleshoot, I decided to try repeatedly writing to and reading from the general purpose register (1100 / $C) to see if I always read the same value I wrote. Here is the program I wrote to do that.

Here is what was written to the memory block at $500.

And here is what was written to the memory block at $600.

It looks like D0-D3 are consistently correct, but D4-D7 are not. I'm not sure what that means and if it is significant.
I have double checked my wiring and it looks correct, and I didn't find any shorts when I checked with an ohm meter.
I am currently clocking my computer using an 8 MHz crystal, but I get similar results when I use a 1 MHz crystal.
I have tied I/M to VCC to ensure the SC28L92 is in 80xxx mode.
Currently, both WRN and RDN are qualified with PHI2, but I had the same results when only WRN was qualified.
CEN is not qualified with PHI2.
I'm not sure what to try next. Does anyone have any suggestions?

Thanks,
Shawn

This makes me suspect you are inadvertently accessing some other register, not the general purpose register (1100 / $C). Is there some other register in the chip for which you'd expect D0-D3 to read back the same, but the other bits not? If so, what is the address of that register? Similar to 1100 except for one bit, perhaps?

In case it helps anyone to ponder, here (below) is an animation to compare the good data (green) with the bad (red).

Despite all your checking, I suspect there's a wiring error or perhaps an error in the doc that guided the wiring. Just a hunch. It's the best I can offer so close to bedtime. Good luck!

ps- any surprises if you change your test program to write then read RAM instead of I/O at $801C?

-- Jeff

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Surprises? That depends on our expectations.
Writing to and reading from RAM doesn't exhibit this problem.

I believe only the Mode and General Purpose registers are R/W. I think the other registers would return something completely different when read than what was written. I had the same problem writing to and reading from the Mode register before I tried the General Purpose register.

You are probably right. I'll probably rewire it and see if that helps.
I would have already ordered another chip to rule out a bad chip, but it's hard to justify paying as much for shipping as the part itself.
Thanks for your comments.

Oops! I lied. I don't get similar results when I use a 1 MHz oscillator. Here are the results I get for each of the oscillators I have.

1 MHz

2 MHz

8 MHz

10 MHz

There are fewer errors the faster it goes.
Time to study the timing diagrams some more!

Shawn

Before doing that, maybe you should directly observe the highs and lows on the various pins of the device during a write and a read. If the values are not as expected then a wiring error probably exists. If the values are as expected then the doc (or your understanding of it) may be faulty.

A logic analyzer is one way to make that direct observation, but instead you could use an analog 'scope, or even stop the clock and measure with a voltmeter. The key point is to measure right on the pins of the IO device, not elsewhere on the board.

In all cases you'd want just a very short loop, such as only three instructions: STA with a value you expect will fail, a LDY to read the value back, and a BRA or JMP so the loop repeats forever.

I suggest using a 2-channel scope and triggering from a channel that's displaying the CPU SYNC signal. When you get that display stable you'll know which instruction is which because only the BRA instruction is 3 cycles. And you'll know the 4th cycles of the other two instructions are the cycles during which the IO device is written and read. Having identified the cycles of interest, now with the other channel you can see what's going on with all the device pins -- address and data, of course, and whatever else you'd like to see.

Stopping the clock could be a question of single-stepping through the loop; on Garth's site he describes how to single-step the clock (halfway down this page). Maybe another option is to somehow tie the device's /CS to the RDY pin, via a flipflop, probably -- one you can manually reset with a pushbutton to advance to the next stopping point (the next device access).

-- Jeff

Edit: I see you posted further info while I was typing this. Now I think scoping the system running at speed would reveal more than single-stepping would. In particular it would be good to see if the actual logic levels need attention.

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

I've been away from the forum for a while, but in that time I have been working on my computer and have made some progress.
I think I previously mentioned that the Ben Eater 6502 breadboard computer re-ignited my interest in building a computer. I started with one of his kits, and then started adding to it. I first added a 6551, and then tried to add a SC28L92. However, since the additions were pretty simple, I never updated Ben's schematic or created one of my own. So, I took some time, started learning KiCad, and created my own schematic.
After I created a schematic I went back and rebuilt my breadboard version following the schematic. While rebuilding the breadboard version I think I figured out that the problem I was having with the SC28L92 was due to noise on the RESET line. I updated the schematic to address the noise, updated the breadboard and everything seems to be working correctly, including the SC28L92.
After that, I completely rebuilt my wire-wrap version. It is currently running at 10 MHz and appears to be stable.
I'm attaching the schematic and some photos if anyone is interested.
I really appreciate all of the help I have received to get me to this point.

Shawn

> After that, I completely rebuilt my wire-wrap version. It is currently running at 10 MHz and appears to be stable.

Oh, that's a victory! Well done!

While I was at it, since I had created a schematic in KiCad, I also created a PCB layout.
Originally I had the ICs oriented vertically with the DB-9 connectors on the right edge of the board, but I thought having them on the back edge of the board would be more conventional, so I moved them to the back edge and re-oriented the ICs horizontally.
I am attaching a photo of the mock-up I used to ensure everything fits.
When I received the DB-9 connectors I found that I had used the incorrect footprint and the physical connectors were several millimeters deeper. I was worried at first, but I was able to move things enough to free up enough room for the connectors. I'm glad I ordered and received the parts before I ordered the PCBs!
The PCB dimensions are 100mm x 100mm to take advantage of the low price from the PCB manufacturer.
By the way, the routing is 100% auto-routed using freerouting v1.4.4. I'm not an expert, so I don't know what could be improved, but I am happy with the results. If anyone sees any glaring problems, please let me know. I'm attaching print outs of the front and back copper layers. I included just the front and back copper layers to keep the clutter down, but if anyone wants to see the ground or power planes, or if the footprints or silkscreen would help let me know and I'll include those.
I plan to double check the layout and routing a few more times before ordering PCBs early this coming week.

Thanks,
Shawn

It strikes me that the signals from the 22V10 all go a long way across the board. It might be a better idea to move it nearer to the devices it connects to. Displacing the 7400 and the UART crystal would be a relatively minor and inconsequential sacrifice.

Conversely, keeping the two memory devices side by side, as they are now, is a good idea since they essentially connect pin to pin. The signals from there to the CPU and other devices are the ones that get tangled up, because the JEDEC memory pinout is a complete shambles. Consider rotating the pair of them together, in 90° increments, to see which way routes the address and data lines least messily.

What is controlling the 28L92's reset line that would generate noise?


10 MHz is nothing to sneeze at, especially with 74HC logic. Good job.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

I'm not seeing anything in your layout that takes care of power and ground. Is this a four-layer board?

Also, there are some places where traces are needlessly being "wound around" pins. Some massaging should produce shorter and more direct paths. Pay attention to the board house's design rules with regard to spacing of different board features. It looks as though you're pretty tight in a couple of locations—it's hard to estimate anything with the layouts in PDFs.

Pay heed to what Chromatix said about the positioning of the chips.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

First, congrats on getting your system up and running, that always feels good... having success!

A few comments on your design and some possible changes. Again, everyone has their own view on this stuff, but...

- Look at the TI7705B as a reset chip. It will give you positive and negative reset lines. You can use the DS1813 for a NMI trigger (panic button).
- WDC also make a W65C22 with an open collector IRQ output. Using this version, you could eliminate the 74HC00 entirely. You can also use a shottky diode for the IRQ line with the existing W65C22.
- I'm guessing you're using one of the serial lines for a console. In most cases, a Serial-to-USB adapter is used, as most current systems don't have serial ports anymore. If this is the case, you could swap out one of the DB-9 connectors with a FTDI adapter... mounts in the DB-9 format and can connect directly to the SC28L92 without any level changes.
- I also tend to hide the bypass caps for socketed DIP devices underneath the chip itself. You can usually get the leads even shorter/closer to the VCC pins that way.

_________________
Regards, KM
https://github.com/floobydust