The flash memory is a 128K chip divided into 4 32K banks. The pins used to select the active bank of the flash memory (P43 & P44) are configured as input pins when the W65C265 is reset and two 3K pull-up resistors (R12 & R13) on the SXB board force the P43_FA15 and P44_AMS address lines high, so by default bank 3 is selected.
This bit of code changes the pin direction (PDD4 @ $DF24) and state (PD4 @DF20) to make the pins P43 and P44 low outputs when a 0 is need or an input when a 1 is needed on the address lines.
Code:
; Select the flash ROM bank indicated by the two low order bits of A. The pins
; should be set to inputs when a hi bit is needed and a low output for a lo bit.
public RomSelect
RomSelect:
php
short_a
and #$03 ; Strip out bank number
asl a ; And rotate into bits
asl a
asl a
pha ; Save bit pattern
eor #$18 ; Invert to get directions
eor PDD4 ; Work out change
and #$18
eor PDD4 ; And apply to direction reg
sta PDD4
pla
eor PD4 ; Then adjust data register
and #$18
eor PD4
sta PD4
plp ; Restore register sizes
rts ; Done