6532 RIOT question
6532 RIOT question
[Note: The original post, which was a 6532 question, as well as the title, were overwritten with spam, which has been deleted. The rest of the topic so far remains uncorrupted.]
Last edited by jknight6 on Tue Sep 07, 2010 10:48 am, edited 2 times in total.
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Quote:
uses the 6502 and 6522 and can get these two parts from Western Digital
Since the 6532 was probably never made in anything faster than a couple of MHz, you could probably emulate it with a fast microcontroller. One member here keeps pushing the SX ones that do 75MIPS IIRC and has an instruction set similar to PICs' but slightly better. It would have to do a lot of instructions for every 6502 half clock cycle to do the whole job, so an actual PIC would not be anywhere near fast enough.
Whoops. Sorry WDC or WD
Being new at this, didn't think there was a difference. Sorry WDC or WD or both!
IMHO Microcontrollers are still too slow to handle that, even at high speeds. They need to monitor the address/data busses and catch the transferred data in a few ns, don't think you can get that with less than say 100MHz (which makes a 10ns cycle time, where each microcontroller opcode can possibly take multiple cycles, and then it still has to be optimal like detect Phi2 transition, read opcode, decode/execute it then read data from the databus within the 6502 cycle time; it would only get a bit better if you latch the data externally, but that would mean more hardware cost)
So I think an FPGA would be the way to go in this case. I have been programming the 6532 and emulating the 6532 in the VICE emulator, there are some tricks with the timer indeed.
But it should be doable with an FPGA. I was thinking about getting into FPGAs, but not before next year or even later...
André
So I think an FPGA would be the way to go in this case. I have been programming the 6532 and emulating the 6532 in the VICE emulator, there are some tricks with the timer indeed.
But it should be doable with an FPGA. I was thinking about getting into FPGAs, but not before next year or even later...
André
Hummm. Guess you are like me, booked up for the forseeable future. Also, guess I will put this design away for a while anyhow. I would think that with 6832s going for $5-$7 a pop that this would make comercial sense to somebody with way too much time on their hands! Maybe in another couple of years when they go above $10.
This is probably a stupid question and I should finish reading the data sheet for the 6532 but ...
Isn't the 6532 functionally (in terms of features) very similar to the 6522? In terms of features all I see in the 6532 that isn't in the 6522 is 128 bytes of static RAM.
In the case of jknight6's question I imagine pin compatibility and actually controlling it will be issues but in general am I missing something?
Isn't the 6532 functionally (in terms of features) very similar to the 6522? In terms of features all I see in the 6532 that isn't in the 6522 is 128 bytes of static RAM.
In the case of jknight6's question I imagine pin compatibility and actually controlling it will be issues but in general am I missing something?
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Found this in a sourceforge project. Has RAM, ports and Timer:
http://fpga2600.cvs.sourceforge.net/fpg ... iew=markup
I haven't synthesised it to see how many logic units it needs but its quite a small bit of code so it might squeeze into a 5V CPLD like the one Daryl was playing with for Video or an Altera MAX 7000.
You could build a small PCB to house the PLCC CPLD chip with DIP40 pins to plug into the main board.
http://fpga2600.cvs.sourceforge.net/fpg ... iew=markup
I haven't synthesised it to see how many logic units it needs but its quite a small bit of code so it might squeeze into a 5V CPLD like the one Daryl was playing with for Video or an Altera MAX 7000.
You could build a small PCB to house the PLCC CPLD chip with DIP40 pins to plug into the main board.
Andrew Jacobs
6502 & PIC Stuff - http://www.obelisk.me.uk/
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6502 & PIC Stuff - http://www.obelisk.me.uk/
Cross-Platform 6502/65C02/65816 Macro Assembler - http://www.obelisk.me.uk/dev65/
Open Source Projects - https://github.com/andrew-jacobs
Don't know how to post directly to LOST's question about the 6522 compatability to the 6532. He is correct that there is no RAM in the 6522; However, not having address bits A0 to A6 also keeps the 6522 from providing the count down Timer or "T" in RIOT. The 6522, without the RAM or "R" and without the Timer or "T" instead of being a RIOT is mor of an IO.
My 2c anyway!
My 2c anyway!
Lost wrote:
This is probably a stupid question and I should finish reading the data sheet for the 6532 but ...
Isn't the 6532 functionally (in terms of features) very similar to the 6522? In terms of features all I see in the 6532 that isn't in the 6522 is 128 bytes of static RAM.
In the case of jknight6's question I imagine pin compatibility and actually controlling it will be issues but in general am I missing something?
Isn't the 6532 functionally (in terms of features) very similar to the 6522? In terms of features all I see in the 6532 that isn't in the 6522 is 128 bytes of static RAM.
In the case of jknight6's question I imagine pin compatibility and actually controlling it will be issues but in general am I missing something?
Now, if you could rewrite the firmware, then I'm sure you could use a 6522 along with external RAM to replace the 6532.
Daryl
jknight6 wrote:
Don't know how to post directly to LOST's question about the 6522 compatability to the 6532. He is correct that there is no RAM in the 6522; However, not having address bits A0 to A6 also keeps the 6522 from providing the count down Timer or "T" in RIOT. The 6522, without the RAM or "R" and without the Timer or "T" instead of being a RIOT is mor of an IO.
My 2c anyway!
My 2c anyway!
Strictly speaking, excepting only the RAM, the 6522 is actually more powerful than the 6532, feature for feature.
BitWise wrote:
Found this in a sourceforge project. Has RAM, ports and Timer:
http://fpga2600.cvs.sourceforge.net/fpg ... iew=markup
I haven't synthesised it to see how many logic units it needs but its quite a small bit of code so it might squeeze into a 5V CPLD like the one Daryl was playing with for Video or an Altera MAX 7000.
http://fpga2600.cvs.sourceforge.net/fpg ... iew=markup
I haven't synthesised it to see how many logic units it needs but its quite a small bit of code so it might squeeze into a 5V CPLD like the one Daryl was playing with for Video or an Altera MAX 7000.
Xilinx compiler stats:
Macrocells Used - 79/144 (55%)
Pterms Used - 478/720 (67%)
Registers Used - 78/144 (55%)
Pins Used - 37/81 (46%)
Function Block Inputs Used 283/288 (99%)
With some tweeking, you may get it to fit in the 95108.
It may also be possible, to just build the timer and IRQ logic into an even smaller CPLD and just use a 6522 for the 2 8 bit IO ports. I haven't checked the datasheet for compatibility on that idea though.
Daryl
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