Safest Zero Page Locations across Multiple Systems

Programming the 6502 microprocessor and its relatives in assembly and other languages.
jgharston
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Re: Safest Zero Page Locations across Multiple Systems

Post by jgharston »

As the operating system is in high memory &FFFF downwards, (by neccessity, the hardware vectors are there), it makes sense for the operating system zero page to be in high memory, &00FF downwards.
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BigDumbDinosaur
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Re: Safest Zero Page Locations across Multiple Systems

Post by BigDumbDinosaur »

jgharston wrote:
As the operating system is in high memory &FFFF downwards, (by neccessity, the hardware vectors are there), it makes sense for the operating system zero page to be in high memory, &00FF downwards.
Which is the exact opposite of how most 65xx-oriented OS's are implemented.

Something to consider if you "reverse" zero page that way is adding new locations may become more of a chore. If zero page usage starts at some low address X, ending at higher location Y and new locations are added in a future revision, they can be added as Y+1, Y+2, etc. The converse would effectively be Y-1, Y-2, etc., which if multiple zero page locations are used as pointers, can lead to complication in making assignments.

Incidentally, and to be a little pedantic, the MOS Technology/WDC assembly language standard for the 65xx family is to notate hexadecimal values as $xxxx, not &xxxx. More than a few assemblers interpret & as the logical AND operator, which would likely make &FFFF ambiguous or lead to an assembly-time error.
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BitWise
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Re: Safest Zero Page Locations across Multiple Systems

Post by BitWise »

BigDumbDinosaur wrote:
Incidentally, and to be a little pedantic, the MOS Technology/WDC assembly language standard for the 65xx family is to notate hexadecimal values as $xxxx, not &xxxx.
The ampersand prefix is the BBC BASIC way of signifying hexadecimal.
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