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PostPosted: Tue Jul 15, 2008 10:19 pm 
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I have a question why 65816 does not wrap $FFFF back to $0000 if emulation is set to one. Only 6502 and 65C02 can do it. Here is an example of my code.

3000: SEC
3001: XCE
3002: LDX #00
3004: LDA 2000,X
3007: STA FFF0,X
300A: INX
300B: CPX #20
300D: BNE 3004
300F: RTS

The data from $2000-$201F will be filled into $FFF0-$1000F on 65816 no matter if emulation is 0 or 1. It will be filled into $FFF0-$FFFF then wrap back to $0000 and be filled into $0000-$000F on 6502 and 65C02.

I understand that if Index X and Index Y are used to modify data bank register. I wonder why data bank register is modified? Why can't they use address index long like LDA $002000 and STA $00FFF0?

I am curious.

Bryan Parkoff


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PostPosted: Thu Jul 17, 2008 6:06 am 
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The way you write is very confusing. I really do not know what you are asking.

The DBR register is not modified by X or Y. The effective address is computed, by adding $XX0000 (where XX is the value of the DBR) to $00YYYY (the value of either the X or Y registers), added again to the absolute address if necessary. Since a full 24-bit addition is performed, the carry propegates normally into the highest byte.

The reason it wraps around in the 6502/65C02 is because it only has 16 address bits, not 24.

If you are interested in precisely mimicking the behavior of the 65C02, you can latch the "E" signal and use that to externally gate A23-A16.

Hopefully this helps.


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PostPosted: Thu Jul 17, 2008 6:44 pm 
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OK. I think that you misunderstand what my code means. I am not confused. My code is very clear. X Index is set to #$00. Data reads $2000,X once. Then, it writes to $FFF0,X once. The loop repeats 32 times until data writes $FFF0-$FFFF and $0000-$000F. The wrap back to $0000 from $FFFF is necessary on 6502 and 65C02 because they only have 16-bit address bus like you stated earlier.

Now, I am trying to say why data bank register is incremented by X Index from 16-bit address bus on 65816. For example, absolute address is $FFFF and data bank register is $00. Both data bank register and absolute address are put together into effective address.

After $FFFF + 1 (X Index) becomes $0000, then carray (not carry flag from processor status) becomes one before carry is added to data bank register. Then, data bank register becomes $01. The effective address reads $010000.

I am aware that data bank register is not modified, but it only copies into temporary 8-bit register before temporary data bank register can be modified.

Is my explanation clear to you? It is a question why $FFFF wraps into $010000 on 65816. I do not understand what you are trying to say the emulation? No matter if emulation flag above processor status is set to 0 or 1 when temporary data bank register is modified into effective address. I suggest you to try to test on your 65816 machine and see it yourself.

Bryan Parkoff


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PostPosted: Thu Jul 17, 2008 7:21 pm 
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Bryan Parkoff wrote:
OK. I think that you misunderstand what my code means.


No, I understood your code crystal clear.

Quote:
I am not confused.


I was going to say that I never said that you were, but your response to me suggests that, in fact, you are. What I had written was that you write in a confusing manner. I never claimed that you were confused.

Quote:
Now, I am trying to say why data bank register is incremented by X Index from 16-bit address bus on 65816.
followed by
Quote:
I am aware that data bank register is not modified


This is what I mean when I say you write in a confusing way. I would suggest that you consider your words more carefully. At least I know what you mean now.

Quote:
Is my explanation clear to you?


It is now, yes.

Quote:
It is a question why $FFFF wraps into $010000 on 65816.


Because it takes less hardware.

To implement wrap-around logic requires more gates, and offers no significant advantage in practice.

Quote:
I do not understand what you are trying to say the emulation?


If you engineer a computer around the 65816, you'll know that the chip has a pin called "E". This signal is true when the CPU is running in 6502-mode, and false when in native-mode. This allows external logic to respond to the CPU's current operating mode, which could well include masking A23-A16 to all zeros if required (like the A20-gate on Intel-based PCs).

Quote:
No matter if emulation flag above processor status is set to 0 or 1 when temporary data bank register is modified into effective address. I suggest you to try to test on your 65816 machine and see it yourself.


I've engineered several computers around the 65816, and am working on another. I can assure you I'm extremely familiar with how the 65816 works, both from a software and a hardware perspective.

Thanks.


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PostPosted: Thu Jul 17, 2008 8:04 pm 
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OK. Thanks for the answer. It does make sense why absolute address adds carry to data bank register. It sounds strange why 65816 MPU avoids extra logic gate to prevent carry from adding to data bank register. It does answer my question well. Thanks...

I have one more question. I do know pinout of 65816 MPU. 65816 is always set true to emulation at power-up. If E line from 65816 MPU is pulled low, it sets false to emulation during power-up. Right?

Bryan Parkoff


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PostPosted: Thu Jul 17, 2008 8:59 pm 
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Bryon,

The 65816 "E" pin is strictly an output. To change to native mode, you have to do it software.

Daryl


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PostPosted: Thu Jul 17, 2008 10:32 pm 
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Bryan, did you try it on actual hardware, or on a simulator? The reason I ask is that I find conflicting information in the WDC literature (which is not surprising). The "Addressing Modes" section of the programming manual shows it all being added together, implying that the bank byte of the 24-bit address could indeed get incremented; but the internal architecture block diagram says both the ALU and the internal address bus are both only 16-bit, which would mean that a carry out of bit 15 of the calcualted address would simply be lost, not added to the high address byte.


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PostPosted: Fri Jul 18, 2008 5:12 am 
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GARTHWILSON wrote:
Bryan, did you try it on actual hardware, or on a simulator? The reason I ask is that I find conflicting information in the WDC literature (which is not surprising). The "Addressing Modes" section of the programming manual shows it all being added together, implying that the bank byte of the 24-bit address could indeed get incremented; but the internal architecture block diagram says both the ALU and the internal address bus are both only 16-bit, which would mean that a carry out of bit 15 of the calcualted address would simply be lost, not added to the high address byte.


The actual hardware behaves this way (I've tried it), i.e. when Y is $01, LDA $FFFF,Y reads $010000 rather than $000000, even in emulation mode. This is in the 65816 data sheet; see section 8.4 on p. 57 of:

http://www.6502.org/documents/datasheet ... b_2004.pdf


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PostPosted: Sun Jul 20, 2008 3:18 pm 
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Joined: Fri Aug 30, 2002 11:01 pm
Posts: 53
Location: Windsor Forks, N.S. Canada
Good Morning Bryan,

In case you do not know about this already, download the excellent
manual on WDC's site " Assembly Language Programming for the W65C02
& the W65816 " or follow this link :
http://www.westerndesigncenter.com/wdc/ ... tation.cfm
It does not answer all questions...but will always bring you back up to
speed quickly !

Good Luck, Wally

Bryan Parkoff wrote:
I have one more question. I do know pinout of 65816 MPU. 65816 is always set true to emulation at power-up. If E line from 65816 MPU is pulled low, it sets false to emulation during power-up. Right?

Bryan Parkoff


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