floobydust wrote:
If the schematic posted is accurate, there's two basic problems (beyond missing bypass caps):
1- The 27pf cap is on the wrong pin per the datasheet
I put it on that pin because I was following along on
this site. He had it on pin 7, so that's where I put it. I will change it.
floobydust wrote:
2- The 1Meg resistor in parallel with the Xtal is missing per the datasheet
So a 1M resistor between pins 6 and 7? I'll double check the datasheet to be sure.
floobydust wrote:
Also, the CPU should have a pull-up resistor connected to the IRQ line regardless... plus others, i.e., NMI, RDY, RES, BE, SO
I'll add the resistor to the IRQ and NMI line. I already have one on the RES line along with a button and a reset circuit connected there. BE, SO and RDY are just connected directly to 5v. I got this configuration from a Ben Eater video. I'm going to look at the data sheet for the 65C02 to see what details are there.
floobydust wrote:
For coding (using the current WDC part) you would need to add a delay loop to allow the chip to send the character out before writing the next character to it.
In the code I posted there is a delay loop, but it's commented out. I also have other code that used a VIA's Timer 1 as an interrupt to send a value to the ACIA data register instead of a delay loop. Like everything else I've done with the ACIA, sometimes it works and sometimes it doesn't.
What size capacitor would you recommend for the bypass? I'm 99% sure that I should have it connected between 5v and ground very close to the chip, but I want to ask if that's right, just in case.
Thank you for taking time to help me out!